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www.us-tech.com
Los Angeles Office:
Atlanta Office:
Key Specifications:
•Reduced inspection programming times using Gerber data
•Geographical checks for component locations and profiles
•Reverse net generation allows addition of component connectivity info
•Organized component libraries output to Hioki 1240
March, 2018
JTAG Visualizer Adds Features for Faster Debugging
Easton, MD — The latest version of JTAG Technologies’ Visualizer graphical viewing software has been updated, allowing users to assess fault coverage data and pinpoint test faults more easily.
With its wide range of CAD (EDA) tool import filters, Visualizer is an excellent choice for professional boundary scan development and test engineers. Users can import schematic data directly from Mentor (Pads, DxDesig- ner, Capture) Cadence, Altium, and Zuken tools, as well as board layout information in ODB++ and many other ven- dor-specific formats.
Key Specifications: •Capable of fine-pitch inspection at 0.2 mm
•Four-terminal resistance measurement between IC leads and pad to detect insufficient solder
•Soft landing feature to prevent board damage
•Supplementary AOI functions including component presence polarity and displacement
•Test resistors, capacitors, diodes, zener diodes, coils, transistors, digital transistors and photocouplers
•Optional CAD conversions •User-friendly Windows operation -friendly Windows operation
Introduced in this ver- sion of Visualizer, the new “Maps” feature offers a basic test-accessibility view with a simple click of a mouse. The view can easily be fine-tuned by adding a few key component descriptions to a look- up table. Using customizable colors to indicate test coverage levels or access type, a color-coded schematic can be displayed or printed. Once the design has been opti- mized for boundary scan test cover- age and committed to layout, final application development can begin in the JTAG ProVision developer tool. A new “visualize on (test) fail” feature can be used to view all failing circuit nets on the schematic view, layout view or both, automatically. This feature is suitable for small- scale production systems, where the test operator is also responsible for fault diagnosis and rework. The “locate next” feature allows the user to track the course of a net connection through the layers of a PCB layout or the sheets of a schematic. Users can now define multiple color themes for distinguishing differ- ent net classifications, such as for fault
coverage in schematics or fault nets in layouts, to aid in debug and repair. With the new “view through layers” feature, a highlighted fault net can now be viewed along its entire path and as it changes course through the PCB’s layers.
Also, notes can now be added anywhere at a fixed position on the
JTAG Visualizer graphical viewing tool.
schematic or layout. This can convey additional information about test processes or pass design details back and forth between different users. Customers can now combine their JTAG Technologies boundary scan tools with existing automatic test equipment (ATE). JTAG works with any vendor of in-circuit testers (ICT), flying probes (FPT) or func- tional testers (FT).
ATE integration is completely trouble-free and merely involves adapting execution software to oper- ate in the specific ATE environment. In many cases, JTAG develops dedi- cated, customized versions of the boundary scan controllers or pods. This simplifies mechanical integra- tion and preserves signal integrity. Contact: JTAG Technologies, Inc., 111 N West Street, Suite A, Easton, MD 21601 410-770-4415 fax: 410-770-4774 E-mail:
info@jtag.com Web:
www.jtag.com
See at IPC APEX, Booth 3007
Heraeus and Nihon Handa Develop Sinter Pastes
West Conshohocken, PA — Heraeus Electronics is strengthening its col- laboration with Nihon Handa by con- cluding a cross-license agreement for sinter pastes. Nihon Handa is a glob- al manufacturer of materials and equipment for the electronics indus- try. The cross-license will provide both companies’ clients with access to a wide product portfolio.
Both companies have long- standing expertise in sinter technolo- gies. Sinter pastes are used particu- larly in power electronics modules. The two patent portfolios in combina- tion refer to various aspects that include morphology, metallic particle size or sintering tools. Health aspects and price competitiveness have led Heraeus Electronics and Nihon Handa to use micro-silver powder rather than nanopowder.
Visit us at
www.seikausa.com to see more of our products!
ik See at APEX, Booth 2043
Heraeus is a family-owned com- pany, formed in 1851, with head- quarters in Hanau, Germany. The company’s portfolio ranges from com- ponents to coordinated material sys- tems. These are used in a variety of industries, including steel, electron- ics, chemical, automotive, and telecommunications.
Nihon Handa develops, manu- factures and distributes solder prod-
ucts. The company has subsidiaries in Shanghai, Hong Kong, and Malaysia, with approximately 150 employees. The company developed Dodent conductive adhesives, which
Heraeus has expanded its sinter paste portfolio with Nihon Handa.
have been available since 1990. Nihon Handa’s product lineup has since expanded to include silver-sin- tered materials and thermally con- ductive materials. Contact: Heraeus, Inc., 24 Union Hill Road,
West Conshohocken, PA 19428 215-944-9981
E-mail:
jeffery.oddo@heraeus.com Web:
www.heraeus-electronics.com
See at IPC APEX, Booth 1713
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