RESEARCH REVIEW
Accelerating SiC growth and throughput Novel reactor enables rapid growth of high-quality 150 mm SiC epiwafers
A JAPANESE TEAM claims to have set a new benchmark for high throughput of high-quality epiwafers by developing a novel 150 mm SiC reactor.
The high-performance tool, which features high-speed wafer rotation and is capable of growth rates of 40-50 µm/hour, was developed through collaboration between five institutions: the Central Research Institute of Electric Power Industry (CRIEPI), Denso, NuFlare Technology, Toyota Motor Corporation and Toyota Central R&D Labs. In addition to the high growth rate – conventional reactors are limited to 30 µm/hour or less, according to reports from academia – strengths of the Japanese reactor include its capability to produce epiwafers that combine a low defect density with excellent thickness and doping uniformity.
Team-member Hiroaki Fujibayashi, who is affiliated to CRIEPI and Denso, believes that in order for a successful SiC device market to develop, there must to be a low-cost, 150 mm growth technology. And it must deliver a high-throughput of wafers with a low defect density and high uniformity.
“Therefore, I consider that the high quality
and high throughput of a 6-inch SiC epitaxial growth process, such as that of our technology, can contribute to growth of the SiC power device market.”
The engineering team refer to their single-wafer tool as a ‘dual reactor system’. Thanks to its design, a throughput of 4 wafers/hour is possible, assuming a growth time per wafer of 15 minutes. Although a multi-wafer reactor has the potential for even higher throughput, there are several good reasons for preferring a single-wafer tool, according to Fujibayashi. He argues that single-wafer reactors are smaller, and this leads to a shorter heating-cooling time and reduced maintenance costs.
What’s more, he points out that the development of reactors accommodating even larger wafers is much easier with a single-wafer platform. With this type of tool, moving from a 150 mm wafer to a 200 mm wafer requires an increase in holder diameter of 50 mm; but with a multi-wafer reactor, the holder diameter would have to increase by 100 mm for an identical increase in wafer size.
High-speed wafer rotation is common for the epitaxy of silicon and III-Vs, where it provides high growth rates and
enhanced uniformity. But, up until now, it has not been applied to SiC, due to the far higher growth temperatures – they are typically 1600 °C.
The team has determined the roles of rotation speed and pressure on growth rates. It has carried out a series of experiments involving deposition of SiC on 4H SiC substrates with a 4° off-cut silicon face. Rotating at 50 revolutions- per-minute (rpm), changes in pressure had little impact on growth rate. But when rotation was cranked up to 1000 rpm, changes in pressure from just below 100 mbar to almost 1000 mbar more than double growth rates to around 50 µm/hour.
At higher pressures, improvements in thickness uniformity with increasing rotation speed are magnified: At 500 mbar, uniformity can be around 0.25 percent at 1000 rpm, compared to 1.5 percent at 50 rpm, when uniformity is defined in terms of the standard deviation divided by the mean.
Really high pressures are not recommended, however. Simulations suggest that at 800 mbar a swirl of gas near the edge of the chamber can be generated, which could lead to particles that contaminate the wafer.
Employing a system pressure of 267 mbar and a rotation speed of 1000 rpm, engineers deposited a 9.3 µm film of 4H SiC on a 3-inch wafer at a growth rate of 37 µm/hour. Total morphological defects in this epiwafer were just 0.2 cm-2
,
while the root-mean-square roughness of the film was just 0.18 nm.
Turning to a 150 mm substrate and depositing a slightly thicker film at an identical pressure produced thickness and doping uniformities of 2.8 percent and 5.2 percent (uniformities are defined in terms of the standard deviation divided by the mean, and calculated using a 6 mm edge exclusion).
Although the SiC reactor is similar to those used for silicon epitaxy, the hot zone features a higher number of heaters: As well as the two-zone lower heater, there are additional upper heaters. Resistance heaters are used throughout, and precise control of the radial temperature uniformity across the entire wafer is possible with a lower heater system featuring inside and outside heaters.
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www.compoundsemiconductor.net January / February 2014
© 2014 Angel Business Communications. Permission required.
H. Fujibayashi et. al. Appl. Phys. Express 7 015502 (2014)
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