CONFERENCE REPORT IEDM Addressing the weakness of GaN transistors
Researchers reveal how to slash dynamic resistance, minimise interface traps and identify the origin of current collapse.
THERE IS NO DOUBT that the GaN transistor has tremendous promise. Sales of this device, which can act as a switch in the likes power supplies, solar invertors and electric vehicles, are tipped to eclipse $1 billion before the end of this decade, according to market analyst Yole Développement.
However, it is by no means guaranteed that sales will soar to anything like that level. Today, this GaN transistor has several weaknesses that have to be addressed before commercial success can follow. Although the static on-resistance (RON
)
of these chips is superior to those of equivalent silicon devices, dynamic resistance is often much higher than that of the incumbents, and this severely compromises the overall performance of these wide bandgap transistors. Meanwhile, a less common but very promising form of the HEMT – that incorporates a metal-insulator-semiconductor (MIS) gate structure and has a lower leakage – has a number of shortcomings. The MIS-HEMT is plagued by threshold- voltage instability and a condition known as current collapse: a temporary increase in RON
that arises from off-state trapping.
Insights into all of these issues and more were provided at the recent International Electron Devices Meeting (IEDM), which was held from 9-11 December in Washington DC. At this gathering, a team from FBH Berlin revealed how the dynamic RON
A study of various HEMT structures uncovered refinements to the device architecture that can slash dynamic RON
. To in a GaN HEMT can be slashed by several orders
of magnitude; researchers at The Hong Kong University of Science and Technology reported new insights into interface- induced instability in the threshold voltage of MIS-HEMTs; and a partnership between MIT and Texas Instruments explained why Zener trapping is the origin of current collapse in this class of transistor.
Dynamic improvements
Many have argued that the superiority of the GaN transistor over its silicon rival is captured in a figure of merit for switching efficiency: the product of on-state resistance and gate charge. Compared to commercial silicon devices, many GaN HEMTs made by industry and academia have an RON
that is typically
an order of magnitude lower. Unfortunately, such claims of supremacy neglect the difference in the dynamic on-resistance of silicon and GaN devices. “If, for example, you have a 600 volt switching device, and you have an improvement in the static
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www.compoundsemiconductor.net January / February 2014
perform this investigation, engineers fabricated a range of GaN transistors on n-type SiC with differing buffer compositions. Normally off devices were fabricated using p-GaN gate technology and had a gate length of 1.2 µm, while normally on variants were based on a 0.7 µm Ir/Ti/Au gate technology. All devices were passivated with benzocyclobutene layers, and to prevent spurious vertical leakage and boost yield, source and drain fingers were additionally isolation-implanted at their centre (see Figure 1).
Würfl believes that if the improvements to dynamic RON are to
be worthwhile, they must not come at the expense of a severely compromised breakdown voltage per micron: “The breakdown strength tells you how large you can make the gate-drain distance. Of course, you would like a very small, safe, gate- drain distance, because if this is very small, the static on-state resistance is decreased.”
The requirement for a high electric field strength that allows a shorter gate-drain separation rules out doping the buffer with iron and adding an AlGaN buffer: dynamic RON
BY RICHARD STEVENSON RON
by a factor of ten [by moving from silicon to GaN], but at the same time you will worsen the dynamic switching RON
factor of a hundred, there is no use in that,” points out Hans- Joachim Würfl from FBH Berlin.
This has led a growing number of GaN developers to take increasing interest in the dynamic resistance of their devices. Resistance tends to have a high value due to temporary charge trapping, which is one consequence of switching. Negative charge trapping often occurs close to the channel, near to the drain-side-edge of the gate. The flow of electrons through the channel is impeded until the trapped charges are emptied, leading to increased conduction loss and compromised system efficiency.
At IEDM, Würfl detailed approaches for realising a dynamic RON that is comparable to a static RON
in GaN HEMTs designed for after high-voltage off-state biasing
switching at 500 V. “That was not imaginable a couple of years ago, when we had a factor of thousand [difference in dynamic and static RON
].” by a
is reduced with
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