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TECHNOLOGY VCSELs


making long-wavelength VCSELs with InP-based materials: a lack of a lattice- matched material system for forming high reflectivity mirrors; the difficulty of realising efficient current spreading layers; and the challenge of producing robust confinement, for both the current and the optical mode. However, the nitrides also presents some additional, substantial complications.


VCSEL challenges To understand why it is so difficult to make a GaN-based VCSEL, one must first understand how this device operates. It is formed by sandwiching a thin active region between parallel mirrors, and it features a cavity length of a few microns – that’s hundreds of times shorter than that of an edge emitter.


The short cavity length enables high- speed direct modulation, thanks to the small photon volume. However, the gain per round-trip pass through the cavity is far less than that for an edge-emitter. To compensate, cavity loss must be very small, and thus the reflectivity of the mirror, which is a distributed Bragg reflector (DBR), must be very high – it has to be of the order of 99 percent.


With a GaAs-based VCSEL, it is relatively easy to form such a high reflectivity. Engineers just have to form a stack of lattice-matched, quarter-wavelength thick alternating layers of GaAs and AlGaAs, which can both be doped,


thereby enabling electrical injection into the cavity. Replicating this approach with the III-Ns has proved impossible, so far, because there are no straightforward methods to form lattice-matched, highly reflective conducting mirrors. This had led several groups to introduce new types of device structures, which either combine an epitaxial DBR with a dielectric one, or employ dielectrics for both mirrors (see Figure 2).


Another consequence of the VCSEL’s short cavity length is the complex standing-wave profile of the electric field intensity. To optimise laser performance, it is essential to position the active region at the peak of this standing wave, while aligning lossy layers, such as heavily doped layers, at a standing wave null. Very precise control of the cavity length is needed to realise this. This is readily achievable in all-epitaxial structures, but more challenging in devices that feature double dielectric DBRs and are formed with substrate lift-off or thinning.


A lack of conductivity in the mirrors used in a GaN VCSEL makes it harder to deliver uniform current injection into the active region, and ultimately to realise high modal gain. Carriers are introduced into the active region with sophisticated current injection schemes, such as single or double intra-cavity contacts. With these approaches, a highly conductive layer spreads the current laterally, prior to injection into the active region.


III-nitrides are unsuitable for current- spreading, due to their very low conductivity. Better is the semi-transparent material indium tin oxide (ITO), but even its conductivity is insufficient to prevent current spreading issues for device apertures greater than 10 µm in diameter. ITO also has significant optical loss in the visible, making the placement of this layer critical to device performance.


A further challenge for the GaN-based VCSEL is current confinement. It is tricky to do this with selective oxidation, a process that is repeatable and reliable for manufacturing GaAs VCSELs. So researchers have turned to current confinement schemes that include patterning apertures in SiO2


or Si3 N4 and


selective-area surface passivation via reactive ion etching of p-GaN.


Challenges unique to GaN On top of the challenges just highlighted, III-nitrides have their own materials issues. Devices grown on the most common GaN plane, the c-plane, are hampered by polarization-related electric fields within the active region that impair material gain and increase threshold currents. Device progress is also held back by the high-cost and limited availability of high-quality native substrates, which are needed to realise epilayers with acceptable defect densities. But even if this native foundation is used, high-quality epilayer growth is tricky, due to the lack of lattice


January / February 2014 www.compoundsemiconductor.net 45


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