Solar ♦ news digest
The paper, “An integrated approach to realizing high- performance liquid-junction quantum dot sensitized solar cells,” by Hunter McDaniel et al in Nature Communications is scheduled for online publication.
In addition to CASP-EFRC, this research has been also supported via a cooperative research agreement with Sharp Corporation.
Trio and partners to research arsenic use in solar panels
The company will develop environmental improvements to capture arsenic from its ore bodies that can be used in the development of gallium arsenide (GaAs)
Trio Resources has joined a consortium that is researching ways to take arsenic, a waste product commonly found in mines across Canada, and use it in the production of solar panels.
Trio will work with scientists in Europe and North America to develop a replacement for the silicon in photovoltaic cells with GaAs.
The company will contribute to the consortium by developing environmental improvements to capture arsenic from its ore bodies that can be used in the development of the GaAs.
Shortcomings in silicon-based technologies have prompted researchers to study alternative semiconductors that could provide faster and lower power devices.
GaAs offers a series of advantages over current technology, including requiring less voltage to enter saturation, providing better photo response and electron mobility and generating a wider operating temperature.
Duncan Reid, CEO of Trio Resources, Inc., comments, “We are excited to be a part of this innovative project, which seeks to take arsenic, a potentially hazardous material commonly found in tailings ponds, and develop it into a useful product that could contribute to the proliferation of clean energy.”
“Our decision to join the consortium reflects our commitment to finding innovative ways to monetize our Duncan-Kerr Property. We look forward to providing updates as this exciting research unfolds while continuing to seek new ways to maximise shareholder value.”
Analysing CdTe solar cells with nanoscale precision
Using low-energy electron beam imaging, the grain boundaries in cadmium telluride can be characterised and better understood. This could lead to the improvement of carrier collection and improve solar cell efficiency
Researchers from the NIST Centre for Nanoscale Science and Technology (CNST) have used a new low energy electron beam technique to probe the nanoscale electronic properties of grain boundaries and grain interiors in CdTe solar cells.
Their results suggest that controlling material properties near the grain boundaries could provide a path for increasing the efficiency of such solar cells.
Among thin film photovoltaic solar cells, those made from CdTe are some of the most successful on the market. However, the efficiency of commercial cells is still less than half of the theoretical maximum, and the underlying mechanisms for the deficiency are not well understood.
CdTe cells are believed to lose current at their material grain boundaries. However, it has also been suggested these grain boundaries have properties that could actually improve carrier collection if they were better understood.
Characterisation techniques using focused electron beams to induce currents are increasingly used for investigating the properties of thin film solar cells. The measurements are easier using high energy electrons, but the higher energy reduces the spatial resolution.
The researchers extended traditional electron-beam- induced current measurements by using low energy beams to locally excite the CdTe and create current. These beams have a spatial resolution of about 20 nm, small enough to map the photocurrent response inside the grain interiors or at the grain boundaries.
The measurements were performed on fragments extracted from a commercial thin film solar cell. Nanoscale electrical contacts were prepared with sizes comparable to a single or a few grains, confining the current path to sizes relevant for understanding current production and loss.
The measurements show that a large fraction of grain boundaries display higher current collection than the grain interiors, seemingly enhancing device performance. However, using 2D finite element simulations, the researchers demonstrated that these grain boundaries also create a large pathway for leakage current, which
January / February 2014
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