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wide bandgap electronics  industry


electric field at the drain-edge of the gate, contributing to a reduction of the electron temperature and trapping. If a plate is not in place, hot electrons diffuse into the bulk, where they became trapped. Insert a field plate and trapping falls, due to a lowering of electron temperature that limits electron spillover from the channel into the bulk. Our gate-lag transient simulations revealed key insights into the so-called current collapse phenomena, with the addition of field plates aiding the recovery of the drain current following a gate off-on switching pulse.


Thanks to improvements in epitaxial material and processing, devices now exhibit nearly ideal characteristics. Although extensive reliability studies of GaN devices are still underway, the nitride community has entered a phase in which simulation of their devices takes on a more conventional role: It provides a tool for designing and optimising device structures for specific applications.


For power switching, gate-drive circuitry is greatly simplified if the switching FET operates in enhancement mode, because the device is then normally off. Interest in this class of device has recently taken off, because it has tremendous commercial potential for power switching.


One interesting and promising variant of the normally off nitride transistor is the p-type GaN gate device that has been pioneered by Oliver Hilt and co-workers from the Ferdinand-Braun-Institute in Leibniz, Germany. As the paper presented by this group at last year’s International Symposium on Power Semiconductor Devices and ICs did not report some of the key dimensions of their transistors, we have had to adopt reasonable assumptions to create a structure consistent with the device performance results (see Figure 2 for details).


In this p-type gate device, highly doped regions are created under the source–drain electrodes that stretch down to the GaN channel to emulate metal spikes and to control contact resistance. Magnesium-doped GaN is used as the p+ gate to deplete the channel at Vg


=0,


yielding a normally off transistor. An AlGaN buffer is used to increase the threshold voltage, and increasing the aluminium content in this layer reduces the on- resistance.


We assume that the Al0.05 Ga0.95 N buffer is completely


relaxed, and the subsequent channel and barrier layers are strained to match the lattice constant of Al0.05


Ga0.95 N,


but with 20 percent of relaxation. The large polarization divergence at the AlGaN barrier surface (barrier/nitride interface) produces a large sheet of negative polarization charge. One might expect holes to accumulate at that interface and completely deplete the


channel of electrons. However, in reality it is still not clear whether the polarization charge is compensated by fixed charges or interface trap states. According to our simulations, accumulated holes at the surface of the AlGaN barrier are completely compensated by deep, single-level trap states.


To assess the device performance for power-switching applications, we perform voltage sweeps of Id


-Vg -Vg , Id -Vd


and off-state breakdown voltage. To match the sub- threshold slope of the Id


curve reported by Hilt and


his co-workers, we add traps to the AlGaN barrier/GaN channel interface. As expected, our simulations reveal that the off-state leakage current and breakdown voltage are strongly influenced by the passivation nitride thickness and field-plate length. What’s more, traps in the buffer affect both the sub-threshold slope and off-


Figure 4.


Id-Vgand Ig-Vgcurves for a structure


with a 1.8 µm field plate and


6 µm gate- drain spacing,


biased at Vd=15V


Figure 5.


Id-Vdcurves for structure with


a 1.8 µm field plate and


6 µm gate- drain spacing. The negative output


conductance shown in the top trace is due to self- heating


October 2011 www.compoundsemiconductor.net 23


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