news digest ♦ Novel Devices
“We were able to dope the graphene into bothn- type and p-type materials through an electron donation or withdrawal effect from the monolayer,” Henderson explains. “That doesn’t lead to the substitutional defects that are seen with many of the other doping processes. The graphene structure itself is still pristine as it comes to us in the transfer process.”
The monolayers are bonded to the dielectric substrate and are thermally stable up to 200 degrees Celsius with the graphene film over them, Sojoudi, a postdoctoral fellow working on the project, notes. The Georgia Tech team has used 3-Aminopropyltriethoxysilane and perfluorooctyltriethoxysilane for patterning. In principle, however, there are many other commercially-available materials that could also create the patterns.
of two separate Dirac points, which indicated an energy separation of neutrality points between the pand n regions in the graphene, points out Soujoudi.
The group uses CVD to create thin films of graphene on copper foil. A thick film of PMMA was spin-coated atop the graphene, and the underlying copper was then removed. The polymer serves as a carrier for the graphene until it can be placed onto the monolayer-coated substrate, after which it is removed.
Beyond developing the doping techniques, the team is also exploring new precursor materials that could allow CVD production of graphene at temperatures low enough to permit fabrication directly on other devices. That could eliminate the need for transferring the graphene from one substrate to another.
A low-cost, low-temperature means of producing graphene could also allow the films to find broader applications in displays, solar cells and organic LEDs, where large sheets of graphene would be needed.
“The real goal is to find ways to make graphene at lower temperatures and in ways that allow us to integrate it with other devices, either silicon CMOS or other materials that couldn’t tolerate the high temperatures required for the initial growth,” Henderson says. “We are looking at ways to make graphene into a useful electronic or optoelectronic material at low temperatures and in patterned forms.”
Clifford Henderson’s face is reflected in a wafer containing graphene p-n junctions. The screen in the background shows electrical data measurements. (Credit: Gary Meek)
“You can build as many n-type and p-type regions as you want,” Sojoudi says. “You can even step the doping controllably up and down. This technique gives you ontrol over the doping level and what the dominant carrier is in each region.”
The researchers used their technique to fabricate graphene p-n junctions, which was verified by the creation of field-effect transistors (FETs). Characteristic I-V curves indicated the presence
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www.compoundsemiconductor.net January/February 2013
Further details of this work has been published in the paper, «Creating Graphene p-n Junctions Using Self-Assembled Monolayers,” by Sojoud et al in ACS Applied Materials & Interfaces,
dx.doi. org/10.1021/am301138v and the publication, “Facile Formation of Graphene P-N Junctions Using Self-Assembled Monolayers” by Baltazar et al in The Journal of Physical Chemistry C,
dx.doi. org/10.1021/jp3045737.
Funding for the research came from the National Science Foundation, through the Georgia Tech MRSEC and through separate research grants.
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