This page contains a Flash digital edition of a book.
Page 58


www.us-tech.com


July, 2017


Using Cell-Aware Scan Diagnosis to Improve Yields


By Matt Knowles, Tessent Silicon Learning Product Marketing Manager, Mentor Graphics F


inding and diagnosing manu- facturing defects in a failing device through scan diagnosis


has long been a way to improve yields for both high-volume ICs and for new manufacturing processes. Scan diagnosis utilizes a design description, scan test patterns and failure data from a tester to identify “suspects,” which are the most likely defects that caused the failure at dig- ital test. Adding layout information to


the diagnosis further helps to improve failure analysis by reducing turnaround time and cost. But, as the industry moves into the FinFET era, product engineers are finding that the established scan test diagno- sis needs an upgrade. With FinFETs, we see more


front-end-of-line (FEOL) defects at the transistor level rather than in


As the industry moves into the FinFET era, product engineers are finding that the established scan test diagnosis needs an upgrade.


the interconnect, and fin-related defects tend to be timing-related, making physical failure analysis and


on that technology. The input to the fault model creation step is a SPICE netlist including x/y location and layer information of each object in the SPICE netlist, or alternatively, the layout file of each from which the SPICE netlist can be extracted. Simulation Program with Integrated Circuit Emphasis (SPICE) is a gener- al-purpose programming language used to check the integrity of IC design. The outputs of this character- ization step are the cell-aware test and diagnosis model for all cells in the technology library and layout marker files for each cell to enable easy cell-level viewing of internal suspects in the layout. These models are used during


Cell-aware diagnosis flow.


yield analysis far more difficult chal- lenges than in the past.


New Approach to Scan Diagnosis A new and powerful scan diag-


nosis technology is now available that uses analog simulation-based fault models to diagnose timing- related cell internal defects in FinFET technology. Unlike existing scan diagnosis, this cell-aware diag- nosis technology can differentiate between defects in cells and in the interconnect, both static and timing- related. Cell-aware diagnosis arms


yield, product and failure analysis engineers with a tool to greatly sim- plify the tasks of finding defects and identifying systematic defects in FinFETs. What makes cell-aware diagno-


sis possible is a new type of fault model created by analog simulation for all physical defects extracted from the library cell layout. The gen- eration of the cell-aware fault model is a one-time task per technology. Once created, this fault model can be used for both test pattern generation and for diagnosis of any design based


diagnosis, along with the design description, tester failure data, and the test patterns. Cell-aware diagno- sis works for any scan ATPG pattern type, such as stuck-at, transition delay and cell-aware. Timing-relat- ed, defect-specific issues like passing bit mismatch and glitch excitation are properly considered as well. The cell-aware diagnosis flow


works just like traditional layout- aware diagnosis after the analog fault models are created. Diagnosis software considers both interconnect suspect and cell internal suspects, and then gives a comprehensive list


Continued on page 60


AVEN Tailored To Fit


Premium Technology Everyday Affordability


SharpVue


• Designed to maximize efficiency and operator comfort


Watch Video


• Large working distance • Crystal-clear HD image • Connects to HD monitor or computer • Imaging and measurement software included • Magnification range: 30x optical, 300x digital • Wireless remote included


aveninc.com | 734-973-0099 | sales@aveninc.com


Item # 26700-135-TTB 360 Tilt Table


Item # 26700-135-XYTB X-Y Gliding Stage


Item #26700-135-4D SharpVue 4D Lens


Inspection Sy stem


Page 1  |  Page 2  |  Page 3  |  Page 4  |  Page 5  |  Page 6  |  Page 7  |  Page 8  |  Page 9  |  Page 10  |  Page 11  |  Page 12  |  Page 13  |  Page 14  |  Page 15  |  Page 16  |  Page 17  |  Page 18  |  Page 19  |  Page 20  |  Page 21  |  Page 22  |  Page 23  |  Page 24  |  Page 25  |  Page 26  |  Page 27  |  Page 28  |  Page 29  |  Page 30  |  Page 31  |  Page 32  |  Page 33  |  Page 34  |  Page 35  |  Page 36  |  Page 37  |  Page 38  |  Page 39  |  Page 40  |  Page 41  |  Page 42  |  Page 43  |  Page 44  |  Page 45  |  Page 46  |  Page 47  |  Page 48  |  Page 49  |  Page 50  |  Page 51  |  Page 52  |  Page 53  |  Page 54  |  Page 55  |  Page 56  |  Page 57  |  Page 58  |  Page 59  |  Page 60  |  Page 61  |  Page 62  |  Page 63  |  Page 64  |  Page 65  |  Page 66  |  Page 67  |  Page 68  |  Page 69  |  Page 70  |  Page 71  |  Page 72  |  Page 73  |  Page 74  |  Page 75  |  Page 76  |  Page 77  |  Page 78  |  Page 79  |  Page 80  |  Page 81  |  Page 82  |  Page 83  |  Page 84  |  Page 85  |  Page 86  |  Page 87  |  Page 88  |  Page 89  |  Page 90  |  Page 91  |  Page 92