TECHNOLOGY VLSI SYMPOSIUM
devices can realise a saturated sub- threshold swing of 190 mV/decade.
“While magnesium doping is effective at reducing the off-state leakage, it does impact electron mobility and device performance, so we are pursuing device designs that need lower or no magnesium doping,” comments Waldron. Efforts are also being directed at achieving a low defect density in the III-V layer when the process is scaled to 10 nm or 7 nm.
Superior scaling Meanwhile, researchers at UCSB are claiming to have fabricated the first III-V MOSFETs that have on-current, off-current and operating voltages comparable to or exceeding production silicon devices – while being constructed at dimensions that are relevant to the VLSI industry.
Devices produced by the team, which is led by Mark Rodwell, Arthur Gossard and Susanne Stemmer, have a 25 nm gate length, can operate at 0.5 V, and produce an on-current of 0.5 mA and an off-current of 100 nA/μm.
To set a new benchmark for III-V MOSFET performance, modifications to the conventional device architecture included a trimming of the InAs channel thickness
researchers at UCSB are claiming to have
“
fabricated the first III-V MOSFETs that have on- current, off-current and operating voltages comparable to or exceeding production silicon devices – while being constructed at dimensions that are relevant to the VLSI industry
” Meanwhile,
to just 2.5 nm. Sanghoon Lee from the team told Compound Semiconductor that the thinner channel aids the off- state current because it increases the quantised band gap of the InAs quantum well, leading to a reduction in band-to- band tunnelling, which is likely to happen near a high drain field region. Another benefit of a thinner channel is an increase in gate capacitance, which could help boost on-current.
The high-performance of these MOSFETs has been aided by the development of a high-quality gate insulator, made from the pairing of Al2
O3 and ZrO2 .
“We have used zirconium oxide instead of hafnium dioxide, because MOS capacitor analysis for zirconium oxide verses hafnium dioxide tells us that the permittivity of zirconium oxide, typically 23, is larger than that of hafnium dioxide, 19,” explains Lee. However, the total gate capacitance would not increase by much if ZrO2
more common HfO2
was replaced by the . According to Lee,
that’s because it is the semiconductor capacitance in the III-V MOSFET, rather than the oxide capacitance, that is the limiting factor for the total gate capacitance.
Due to this, Lee argues that the impressive performance of the MOSFET is essentially down to the insertion of a thin channel, plus the introduction of a vertical spacer that leads to a smoother distribution of the field within the device. By ironing out the spikes in the electric field profile, band-to-band tunnelling is prevented and leakage currents are reduced.
MOSFETs were formed from epistructures grown by MBE on semi- insulating InP. After depositing a 50 nm-thick unintentionally doped InAlAs buffer, engineers added: a 250 nm-thick, p-doped InAlAs barrier; an unintentionally doped 100 nm-thick InAlAs barrier; a 2 nm-thick InAlAs n-type, pulse-doped layer; a 5 nm-thick unintentionally doped InAlAs setback; a 3.5 nm-thick strained InAs channel; and a 2 nm-thick, unintentionally doped In0.53
Ga0.47 spacer (see Figure 6).
Figure 6. The vertical spacer and the thin InAs channel are claimed to hold the key to the high-performance of the UCSB MOSFET.
Dummy gates with lengths ranging from 12 nm to 1000 nm were formed by coating wafers with a 20 nm-thick film of the photoresist hydrogen silsesquioxane, and patterning the surface with electron- beam lithography. MOCVD added the
Copyright Compound Semiconductor Issue VI 2014
www.compoundsemiconductor.net 53
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