Compound Semiconductor July 2013

INDUSTRY CPV

GeSn lattice allows the entire III-V material stack to be engineered, and this ultimately promises to increase photovoltaic energy yield and efficiency (see Figure 2).

The full potential resulting from the addition of group IV alloys to CPV material engineering only comes when silicon is added to GeSn. This is possible by injecting the precursor trisilane (Si3

H8

)

into the growth chamber. Switching from a binary to a ternary, in this case from GeSn to SiGeSn, allows the lattice spacing to be fixed while the bandgap can vary (see Figure 3). This is the path that we are promoting to add the desired 1eV sub cell to the multi-junction cell (see Figure 4).

Proving the concept We select a particular type of silicon substrate for our work, because we must ensure that the germanium that is formed on it has the same crystalline orientation as that currently used in bulk substrates; that is, for photovoltaic templates we employ silicon <100> with a 6° mis-cut toward the <111> direction.

The germanium grown on this has incredibly high purity. According to compositional analysis providing by Rutherford Back Scattering and X-ray diffraction measurements, the germanium layer, which can readily reach 5 µm or more, has a tin content of just 0.05-0.3 percent. This layer is optically flat and smooth, with atomic force microscopy images revealing a root-mean-square surface roughness as low as 0.8 nm on 5 µm x 5 µm scan. Morphology of the virtual germanium wafer typically resembles the stepped surface produced on vicinal substrates.

Crystalline quality of the germanium is excellent, with double-crystal X-ray diffraction measurements giving a full-width half maximum for the germanium (004) reflection as low as 0.05 degrees (180 arcsec), while defect measurements performed by chemical etching methods indicate that defect densities can be as low as the order of 1 × 106

Capacitance-voltage measurements indicate that the Ge(Sn) material is p-type, with a carrier concentration of 1 × 1017

cm-3 .

To take advantage of all these attractive qualities in a commercial manufacturing environment, the template must be compatible with existing upstream processes. For MOCVD, a key requirement is that the surface miscut on the silicon substrate is carried through to the germanium layer, where it is needed to prevent the formation of anti-phase domain boundaries. The good news is that reciprocal space mapping of epitaxial germanium-on-silicon shows the magnitude of the surface miscut (5-6°) is preserved (see Figure 5).

An important tool specification in the silicon industry is wafer bow, which often has to be below 50 µm. If it exceeds that, it leads to problems with the automatic wafer handlers in the silicon lines. Our engineered wafers are well within this specification, with three-dimensional scanning techniques revealing that the vertical distance between the edge and centre of the wafer is less than 30 µm for a 5 µm-thick germanium template (see Figure 6).

These engineered substrates are now being evaluated by commercial partners, who have proceeded with trial growth of III-V materials and device structures by MOCVD. Pilot runs confirm that our virtual germanium/silicon substrates are suitable for subsequent MOCVD growth, and just a minor modification is required to the growth recipe for the nucleation layer. Initial tests included the growth of thick, lattice-matched InGaAs layers with

“ cm-2 .

Figure 5. X-ray reciprocal space mapping confirms that surface miscut of the epitaxial GeSn is the within one degree of the underlying silicon substrate [<100> 6° off to <111>]

An important tool specification in the

silicon industry is wafer bow, which often has to be below 50 µm. If it exceeds that, it leads to problems with the automatic wafer handlers in the silicon lines. Our engineered wafers are well within this specification, with three-dimensional scanning techniques revealing that the vertical distance between the edge and centre of the wafer is less than 30 µm for a 5 µm-thick germanium template

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