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INDUSTRY POWER ELECTRONICS


An EPC 150 mm GaN-on- silicon wafer


to issue after almost four years through the patent office.


Cao and Robert Beach to found Efficient Power Conversion of El Segundo, CA. We set ourselves two goals: to be the first to develop an enhancement mode (normally off) transistor based on GaN grown on silicon; and to make a GaN transistor that costs less than the power MOSFET.


Initial funding for our venture came from a small investment from my mother, and a second infusion followed from our incredibly farsighted, patient partners in Taiwan. Teaming up with them has been incredibly beneficial, because they control a silicon foundry and they agreed to open its doors to our GaN-on-silicon wafers. Access to this line has held the key to us being able to achieve our goal of low cost.


Figure 1: EPC eGaN FETs are delivered in an LGA format as shown. Dimensions of this device are approximately 1.6mm x 4.1 mm


We found it tough to succeed in our first quest, to develop an enhancement mode transistor. We began by building crude prototypes, using lab facilities at the University of California, Los Angeles, as well as the shed behind the house of our co-founder, Bob Beach. Performance of this device increased, and eventually reached a level where were able to move this process to our partners’ foundry in Taiwan. They had purchased a state-of-the-art MOCVD reactor that could be used to grow GaN-on-silicon starting materials. After many trials and errors – and long nights and weekends – we hit our first milestone, the fabrication of a lateral GaN HEMT capable of operating in enhancement mode. This development also led to the generation of many patent applications, some of which have started


Shooting for the sweet spot Our primary target was the mid-voltage market – devices with blocking voltages of around 100 V, which could be used for audio amplifiers, DC-DC converters and UPS systems. We selected this sector because, although it was relatively small, it had a relatively high pricing structure compared with the market for devices operating at lower and higher voltages (below 40 V, or 600 V and above). Another attractive feature of this mid-voltage market is that customers place significant value on the high-frequency performance of GaN, so they are willing to pay a higher price for this wide bandgap device than they would be willing to do in a more commoditized market.


Our status as a start-up and our limited funding made it tricky to package our devices. We couldn’t partner with a large packaging subcontractor, because they did not want to be bothered by a small, risky customer.


In the end we decided to take a radical step, delivering our product without a package. Today all of our products are delivered in this manner, using a Land Grid Array (LGA) format with solder bars applied in wafer form. This approach may raise a few eyebrows, but it has been an unquestionable success. It doesn’t just allow us to make a big step towards our goal of making a product that is cheaper than a packaged power MOSFET (on average the cost of the power package is as much as that for the silicon inside) – it also enhances performance.


During my years involved in the manufacturing and selling of power devices at International Rectifier, I heard many customer complaints about the packaging of power devices, including concerns that they were too big, and they had too much internal resistance and inductance. In comparison, our LGA format delivers the absolute minimum package size and cost, and has attributes such as zero parasitic resistance and inductance (see figure 1).


In 2009, we produced beta samples of our first product, the EPC1001. It outperformed all 100 V silicon-based devices in switching applications. We demonstrated its superiority over the incumbent technology by comparing the most common figure-of-merit for evaluating power MOSFETs: the product of the device on-resistance (RDS(ON)


) and the overall gate charge (QG ). The


performance of this device is far higher than that of state-of-the-art silicon MOSFETs (see Figure 2). Following several months of beta testing with customers, we made necessary adjustments and improvements to our device and launched our product line in March 2010. In order to distribute our product as widely as possible, and to get


34 www.compoundsemiconductor.net June 2013


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