Power Electronics ♦ news digest devices on silicon substrates.
Fabricating GaN LEDs and power devices on large diameter silicon wafers is viewed as a path to improve performance and reduce cost, thereby increasing commercial acceptance of these devices. However, existing buffer layers used to bridge the large thermal and lattice mismatch between silicon and GaN are costly and not completely effective for large scale production.
A 3C-SiC film provides an effective buffer layer lattice- matched for GaN growth on silicon, as well as an impervious barrier to prevent silicon from diffusing into GaN, of particular concern to power devices.
Initial estimates are that the new SiC on silicon coating process in volume production would add no more than $25-35 to the cost of a silicon wafer, substantially increasing the appeal of silicon as a substrate for LEDs and GaN power devices.
“We believe we are the first in the world to grow 3C-SiC epitaxially on 300mm silicon wafers, which means following the same crystal structure as the silicon crystal substrate,” says Alan Iacopi, QMF Director of Operations.
“The reactor development project with SPTS has allowed the QMF R&D process to be extended from small wafers up to 300mm wafers with semiconductor industry specifications; in fact, we have already achieved SiC film thickness uniformities of around 1 percent on 300mm wafers using the new reactor,” he adds.
“SPTS is excited to be a partner in this project, as we see the QMF SiC technology as a potential breakthrough in reducing the cost of LEDs and improving the performance of GaN power devices,” according to William Johnson, President and CEO of SPTS.
He continues, “Based on our extensive background in vertical furnace technology, the new reactor has been designed for high temperature vacuum processing of batch loads of 150mm to 300mm wafers, with process automation suitable for commercial application. There are a number of buffer and template wafer suppliers offering alternative solutions; however, we see a strong business case for device manufacturers adopting the QMF/SPTS SiC solution to optimize process and control substrate costs.”
Iacopi adds, “The Griffith University and SPTS partnership has far reaching implications in terms of demonstrating how Australian research entities (like QMF) can collaborate with international industry to advance frontier technologies and bring industrial benefit to Queensland. We have all the ingredients to develop a high tech economy in Queensland, including technically leading Universities, the Australian National Fabrication
Facility infrastructure, entrepreneurial spirit, and start-up company investment support.”
Europe to boost micro- and nanoelectronic industries
A new initiative is supporting research, development and innovation and improvement in the entire semiconductor ecosystem
The European Semiconductor Industry Association (ESIA) welcomes the European Commission’s Communication “A European strategy for micro- and nanoelectronic components and systems”.
The actions outlined in the Communication will strengthen the competitiveness and growth potential of the micro- and nanoelectronics industry in Europe, and build upon the European initiative on Key Enabling Technologies (KETs) and HORIZON 2020.
ESIA believes that this Communication takes a decisive approach to reinforce the European semiconductor industry, and to increase its contribution to the wider European economy.
ESIA commends the acknowledgment that semiconductors play a crucial role in driving business transformation and responding to growing societal needs. This communication recognises the electronics industry as a key force to address the challenges the economy in the EU is facing.
ESIA fully supports the Commission’s multi-level strategy including financial support for research, development and innovation (R&D&I), as well as the improvement and better use of relevant legislation. Given the very high diversity of the European market, ESIA is pleased to see the entire semiconductor ecosystem being addressed.
With a clear focus on R&D&I, market pull for new application areas, education and production, the strategy builds on the four pillars ESIA has been promoting as a basis for a dedicated European industrial policy for the micro- and nanoelectronics sector.
Rick Clemmer, ESIA President and CEO of NXP Semiconductors, states, “Pilot lines and prototyping are a welcome addition to the European R&D stimulation programme. But this concept should not be limited to semiconductor manufacturing as such. Joint semiconductor downstream application pilots will provide significant additional leverage in economic growth and employment in areas such as the Internet of Things and Smart Cities, including Intelligent Traffic Systems, Smart
June 2013
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