SiC electronics technology
with the RF test fixture to control the entire DC and RF functioning of the device. This new circuit technology will hopefully help to speed up our customer’s implementation of our products into their power amplifiers.
The primary function of the source pulser is to set an appropriate bias level for the device. The pulser’s main component is a high-speed analog switch that toggles between an off-voltage of +15 V and an on-voltage of 3- 5 V. The bias switching parameters are synchronized with the RF pulse.
A “source pulser” board is used with an RF test fixture to control the DC and RF behavior of the SiC SIT
performance, highly precise automated die-attach and wire-bond machines are used in production.
Driving the SIT The SIT is designed to operate at full power over 406- 450 MHz, a lower spread of frequencies within the UHF band. To do this it should be biased in “class AB, Common Gate” and run with a drain supply at 125 V. The terminal impedances are only a few Ohms, so an external matching network is needed to transform the impedance from the transistor up to 50 Ohms for device characterization and use. Fixture optimization includes a complete “load pull” analysis of the transistor, which can confirm that the matching network is designed for the best overall performance.
One of the benefits of load pull analysis is that it yields valuable information on device performance. It can quickly determine the optimum input and output device impedance over the band of interest, and rapidly deliver a trade-off analysis on critical RF performance parameters. We use these load pull impedance values as a target for the design of the input and output circuit-matching networks.
The typical input and output contours for a single frequency are shown in Figure 3. These contours offer an indication of how sensitive the device is to impedance changes. We obtain contours and optimum input/output impedance for each frequency across the band of interest. Our SiC SIT is a depletion mode device. Consequently, application of a gate bias is needed to turn the product ‘off’ before applying the drain bias. To aid the driving of the SIT, we include a ‘source pulser’ design
When we start to manufacture our SIT in full production, we will add a bias sequence feature to ensure a proper power-up sequence during RF tests. Future efforts in this area may include the development of highly compact and efficient ASIC versions of the pulser assembly. Our SIT is designed to deliver incredibly high, pulsed powers. To verify that every product is capable of delivering this level of performance through its lifetime we will subject every transistor to a full functional set of tests prior to shipment. Due to the high voltages and currents associated with the driving of the device, the test procedure accommodates the latest operator safety procedures and power handling.
One of the strengths of our SIT is its ability to operate over a wide range of conditions, from very high peak powers at medium pulses to very long pulses at high duty factors. Thanks to its versatility of driving conditions, the SIT can support a wide range of applications. So to help potential customers evaluate what our SIT can do for them we have characterized this transistor for operation at conditions beyond those listed on the standard data sheet. To do this, we have made substantial investments in RF metrology and also developed highly automated test software. The reward of these efforts is the characterization of our products over multiple test conditions with very high levels of accuracy and repeatability. We believe that our SIT will have a massive impact on the design and build of the next generation of radar systems, and also their operational life, which is typically more than 35 years. We expect uptake of our SiC devices to be high. They can slash the number of components that a radar system needs, making it far smaller and cheaper. What’s more, the introduction of SiC into radar systems can cut maintenance costs and greatly expand operating life. Making a transition to a new product always involves some
effort, because new devices behave differently and require new design rules. But we are convinced that this effort is justifiable, because our SIT offers great performance, alongside the consistency and reliability that designers of radar system
are looking for.
Microsemi has a Centrotherm HV 100 high temperature implant anneal system in its power chip fab in Bend, Oregon. This tool is capable of operating at up to 1700o
C
Left: Microsemi’s SIT, which is shown with the lid off, is
shipped in a hermetically sealed package. Gold wiring is used throughout
August / September 2010
www.compoundsemiconductor.net 33
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