technology  GaN microelectronics


Figure 6. Current-voltage characteristics for an AlInN/GaN HEMT grown on semi-


insulating SiC. The gate length of the device is 55 nm


forming gas followed.


Post-process transmission-line measurements revealed contact and sheet resistances of 0.3 Ω/mm and 182 Ω/. Electron-beam lithography defined Ni/Au T-shaped gates with a 55 nm footprint in the center of the 1 µm source/drain space using high-resolution electron beam resists. A 100 nm-thick, SiN passivation film was then deposited by plasma-assisted CVD and patterned to create the contact pads. Ti/Au was used for the overlay metallization. The 55 nm gate HEMT produces a maximum drain current of 2.3 A/mm at a gate-source


voltage (VGS) of 0 V (see Figure 6). Extrinsic transconductance (gM ) peaked at 575 mS/mm when the HEMT was operated at a VGS = -5.3 V and VDS = 4.0 V.


quality of epitaxial layers (as revealed by the XRD linewidths). However, resistance is still only 300 Ω/. This value indicates that silicon can provide a platform for realizing high-performance millimeter-wave transistors on low-cost substrates. The thermal conductivity of silicon lies between that of sapphire and SiC, and it has the potential to be used as a low-cost platform for GaN/AlInN HEMTs in either systems requiring lower CW power operation, pulsed output (such as radar) and/or in systems requiring many cheap devices (decoys).


Record breaking devices Our epitaxial HEMT wafers include a structure with a 30 nm AlN nucleation layer, a 1 µm-thick GaN insulating buffer and channel layer, a 1 nm AlN spacer layer, and a


10 nm thick, nearly lattice-matched Al0.86In0.14N barrier. This structure had a channel electron sheet density of 2.4 x 1013 cm-2, a mobility of 1,300 cm2/Vs, and a sheet resistance of 200 Ω/, according to room-temperature Hall measurements. Incidentally, similar AlInN/GaN HEMT epilayers are commercially available from EPFL start-up NovaGaN.


The layers were processed in the ETH-FIRST Laboratory in Zürich. Mesas were defined in the epiwafers by plasma etching, before ohmic contacts were added by Ti/Al/Au evaporation. Two-step rapid thermal annealing in N2/H2


AlInN/GaN devices often show a residual gate leakage current, and this is now a topic of investigation in various groups. Understanding the leakage mechanism, and stemming its flow, will be key to increasing the power- added-efficiency characteristics of these HEMTs, ultimately enabling them to meet the efficiency requirements for certain applications.


The gate leakage origin still is a mystery, but not all researchers involved with AlInN/GaN HEMTs experience excessively high gate leakage currents. Leakage may be primarily associated with epitaxial growth, device processing or even a combination of both. At this time it is known that one can reduce it by inserting insulators between the gate metal and the barrier, but it remains desirable to suppress leakage in a standard HEMT structure to keep the gate as close to the 2DEG as possible. At this point it should be kept in mind that the leakage issue may partly arise due to the thin barriers used − it is then normal to expect a higher leakage than with thicker barriers, just as it is observed in AlGaN/GaN HEMTs!


Transistor microwave performance at the peak fT bias of VDS = 4 V and VGS = -5.3 V has been measured (see Figure 7), and extrapolation of the short-circuit current


gain |h21|2 and of Mason’s unilateral gain U with a -20 dB/dec roll-off yields a fT of 205 GHz and fMAX(U) of 191 GHz. The fT and fMAX remain high for a broad range


AlInN/GaN devices often show a residual gate leakage current, and this is now a topic of investigation in various groups. Understanding the leakage mechanism, and stemming its flow, will be key to increasing the power-added-efficiency characteristics of these HEMTs, ultimately enabling them to meet the requirements for certain applications


20 www.compoundsemiconductor.net August / September 2010


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