IEDM conference report
The team, led by Chen and including John Roberts from the US GaN-on-silicon HEMT trailblazer Nitronex, has recently focused their efforts on studying reliability under high gate bias and low drain bias, the standard condition for operating a power switch in its “on” state. In this state, especially when the gate is overdriven to either minimize the on-resistance or accommodate current surge, the Schottky gate tends to feature a non-negligible current – this also raises reliability concerns.
One of the goals of the team’s recent work has been to investigate whether the fluorine ions, which are mostly located in the gate barrier layer, are stable under gate forward overdrive. If they are unstable and cause reliability issues, the team would aim to identify the critical gate bias and consequently the operating conditions to drive a device without degradation.
The team fabricated AlGaN/GaN HEMTs with a 1.5 µm gate length and gate-source spacing, and a gate-drain spacing of 2 µm. They found that the critical gate overdrive voltage was 3.6 V and 2.8 V at drain-source voltages of 2 V and 0.85 V, respectively. At higher voltages, the channel turn-on voltage experienced a small, persistent negative shift, and at lower voltages the transistor realized excellent stability.
The negative shift in channel turn-on voltage is an undesirable characteristic. “A large negative shift means that the E-mode device could eventually drift to a D-mode one,” explains Chen. “In practice, we need to stabilize the on-voltage at the positive value.”
Impact ionization of fluorine ions due to hot electron injection is viewed as the primary driver behind the shift in on-voltage with temperature. “Impact ionization is one of the few reliability-relevant physical processes that becomes weaker as temperature goes up, “ says Chen. “In semiconductor devices, most degradation processes could be accelerated at higher temperature. With regard to the on-voltage shift, it becomes smaller and eventually disappears as the temperature is raised.”
Modeling HEMTs The various approaches to modeling the behavior of GaN HEMTs in RF power amplifiers was touched on in a paper by David John and co-workers at NXP Semiconductors, who have pioneered the development of a surface- potential based model. This joins a growing list of models for predicting HEMT behavior, which all have their weaknesses, according to John. Table-based models, which use an interpolating spline on measured data, can give erroneous values for bias outside the range. Threshold voltage based models can struggle at threshold values and empirical models fail to scale. We cannot predict how geometrical changes impact performance.
“From metal-oxide-semiconductor modeling, surface- potential-based models are known to be the preferred approach for scaling, extrapolation, distortion modeling, statistical modeling and so on,” says John. “ All Compact Model Council standardization efforts focus on the surface-potential-based models for this reason.”
NXP’s model resembles that for a conventional MOSFET. However, it reflects one fundamental difference between these two types of transistor: HEMTs are based on accumulation at the surface, while MOSFETs operates in inversion. To account for this, John and his co-workers derived the equations for currents and charges from scratch using nonlinear, binomial expansions of the electronic charge density. After the engineers had constructed this core model that provides fast simulation times, they compared its predictions to numerical simulations of a gated section of a full device.
“The numerical simulations checked that the approximations we have made in order to arrive at compact expressions are consistent with the idealized structure that we are using to describe the device,” explains John. These efforts showed that the core model is good at describing current as a function of bias and catering for the bias dependence of the capacitance.
The researchers then built a macromodel that encompasses the core model. This is claimed to account for the regions under the gate foot and the drain-side gate edge with an approach that is based on physically justifiable differences in the underlying model parameters. Resistors, capacitors and inductors describe passive parasitic elements and the rise in device temperature resulting from power consumption is captured with a simple thermal network.
To test the model’s validity, NXP researchers have compared its predictions to real data obtained from on- wafer measurements of multiple-finger, multiple-cell GaN HEMTs. This effort revealed that the model captures DC measurements at different temperatures, including a negative output conductance at high powers that stems from strong self-heating.
Simulations of RF behavior are also close to measured results, according to capacitance and transconductance comparisons at 2.6 GHz.
The model can also be used to simulate circuits after it has been calibrated to measurements, a necessary step for any compact model. “We are constantly working to improve our model, and to further validate and benchmark it,” says John. “There is still work to do.”
That view holds true for many other aspects related to the GaN HEMTs. The good news, however, is that progress is clearly being made on many of these fronts. It will be interesting to see what IEDM hold in store at the end of 2011.
© 2011 Angel Business Communications. Permission required.
January / February 2011
www.compoundsemiconductor.net 23
Figure 2. Introducing boron-doped channel stoppers
delivers a hike in the HEMT blocking voltage
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