August, 2015
www.us-
tech.com
How Clean Is Clean Enough for Reliability?
By Mike Bixenman, DBA; David Lober, KYZEN; Mark McMeen and Jason Tynes, STI Electronics, Inc. D
irt and residues trapped under bottom cir- cuit terminations can affect performance due to shorter distances between conduc-
tors, higher pin out devices in smaller footprints, higher electrical field densities, and various envi- ronmental factors. No universal test method can ensure proper cleanliness and reliability. A three- phase approach is commonly used to specify the manufacturing process requirements for cleanli- ness. The three phases involve screening experi- ments with inexpensive test vehicles, performing validation experiments with more representative test vehicles, and performing verification runs on manufactured assemblies. Unfortunately, current chemical
and electrical test methods limit the effectiveness for testing residues entrapped under component termina- tions. Residues under the bottom ter- mination have the highest potential for leakage and are the least under- stood. Gaining a better understand- ing of no-clean residues that do not outgas during reflow will help relia- bility engineers understand how much cleanliness is required at a ter- mination interface. Inadequately cleaned electronics can lead to prob- lems with intermittent connections, corrosion, electrical shorts, and arc- ing. Contamination can come from many sources, including fabrication residues on components, post-solder- ing flux residues, and even residues from processing equipment and cleaning machines. Electronic parts soldered onto a
printed-circuit board (PCB) typically have flux residues trapped between the component body and circuit board. Cleanliness at the compo-
Knowing which levels of cleanliness are sufficient for different circuit
designs can help ensure providing optimum
performance in today’s
communications circuit designs.
nent/board interface is critical to achieving high reliability and is the least understood of PCB manufactur- ing issues. Ionic levels in flux residue can exacerbate contamination levels under a component and/or create high-resistance short circuits across component termination pads. The location of residue on a PCB
is important. Residue pooled under the component may still be active and ionic in nature. Contamination can be influenced by flux type, placement, wash characteristics, solder paste vol- ume, PCB cleanliness, and compo- nent contamination. These factors create a “multi-variable” issue that is challenging to understand.
Surface Insulation Resistance To understand the impact of
cleanliness of electronic circuits, an experiment was designed to quantify the influence of surface insulation resistance (SIR) on a specific set of ionic species and no-clean flux residues under component bottom terminations. The intent was to explore SIR as it relates to species type, species concentration, and con-
ductor spacing. The testing will help quantify rela- tionships between ionic concentration versus SIR and SIR versus conductor spacing. Test results will be used to further improve industry guidelines for maximum ionic concentration levels for given circuit board densities/conductor spacings. Results will also be used to produce minimally acceptable SIR (cleanliness) levels. The experimental test board has sensors
An example of the residue that can build up under a solder terminated component.
placed under the bottom termination. The sensor traces provide real-time SIR data within the residue. Locally exposed traces route to the edge of
Continued on page 58
Page 55
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