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www.us- tech.com


July, 2019


Optimized Reflow Profiling to Minimize Voiding


By MB Allen, Manager, KIC


lead-free soldering was discussed in the U.S. It continues to be a problem for lead-free assemblies, but the prob- lem has become even more complex. With miniaturization and many components


V bottom-terminated


(BTCs) we continue to struggle to find the true causes and the ideal solutions. In addition, the variety of PCB assemblies is incredible. Some assemblies seem to ignore any design for manufacturability (DfM) rules. They range from small PCB assem- blies with miniaturization of parts and often a BGA to very large, heavy, double-sided PCBs with ground planes, heat sinks, and densely popu- lated components. Added to that is the mixture of


circuit board components that cannot be seen with the naked eye, all the way up to tantalum capacitors, BGAs, QFNs, plastic connectors, shields, and much more. The next challenge is the reflow


process window. Typically the process window is focused around the solder paste, but often some compo- nents cannot accept the temperature tolerances of many lead-free solders. We deal with the problem of void-


ing during manufacturing, yet it is the final effect on a product that is key, and sometimes that gets lost. This is why voiding is such an important issue. Voiding is attributed to the flux outgassing within the solder joints while the solder is in a molten state.


Potential Solutions for Voiding One of the biggest advance-


ments has been in changes to solder paste chemistry. However, making a change to a new solder paste is not a drop-in solution, nor is it always the correct solution. Often a contract manufacturer


is given specific materials to use when assembling a board, and can- not just change the paste without a qualification process, which is costly and time-consuming. Also, while this material may


solve the voiding issue for some com- ponents, it may cause problems else- where on the circuit board. Many companies do not want to have mul-


Factors that impact voiding.


been made to adjust the amount and spacing of the paste deposition. However, trying multiple stencils is also costly and time-consuming. Trial and error seldom feel like a good solution. Placement is also a key element in the voiding problem and an important place to look for problems. Another solution may be a new


type of reflow oven, specifically a vac- uum reflow or ultrasonic reflow oven. This is an expensive solution and may be difficult to justify. Typically, we see factories invest in one of these ovens for specific products with void- susceptible assemblies.


Thermal Profiling The best news about thermal


profiling as a solution, as opposed to the ones above, is that it is an imme- diate fix. Even if some experimenta- tion is required, the results are avail- able immediately to make decisions quickly. The key areas of the thermal


profile that can be changed to reduce voiding are the peak temperature, time above liquidus (TAL), the ramp


suggestions for reducing voiding in LED assembly is increased tempera- tures, which can be harmful to the LEDs themselves. Too much heat can cause changes in the LED’s luminosi- ty, which can be an expensive error. To find the right PCB profile, it


is critical to focus on these areas of the thermal profile:


l Soak: There must be a balance


between soak that is too slow (avoid oxidation) and a soak that is too fast (entrapping the volatiles). For the most part, a “soak” profile is no longer commonly used when having a voiding problem.


l The ramp to peak/spike: Tent


and/or straight ramp, depending on the solder paste company, is current- ly being used to reduce voiding. Some are in favor of a lower peak, while some prefer a higher peak, which has the greater consensus.


l Ramp rate: This is also key, concen-


trating on the amount of time and rate at which the activation takes place and the volatiles are released.


l TAL: This is key to improved wetting


oiding has been a challenge for quite some time, primarily with BGAs, ever since the shift to


tiple solder pastes. Often a low-void- ing paste is not the correct solution for all assemblies. Thus, changing materials may not be an ideal, or even a possible, solution. Then there is the PCB stencil. Some creative stencil apertures have


rate, and the soak time. Even when focusing on the thermal profile there are more challenges. Exactly what to change is based on the PCB density and components, finding a balance to fix one area without impacting others. One example is the LED. Some


and less chance of flux entrapment. TAL and peak are two areas that


have the majority of changes to the profile, and therefore, time given to experimentation. As we progress through these changes to the profile, we must consider the rest of the PCB assembly. Temperatures too high can damage parts, such as plastic connec- tors or LEDs. When setting up a recipe for a thermal profile it is imperative to find a solution that offers a reliable solder joint for the entire assembly. Thermocouples should be attached to all critical components for a good rep- resentation of the PCB.


Void-Avoiding Profiling A reflow profile with a soak is


generally not recommended when try- ing to reduce voiding. For those wish- ing to maintain a soak, research shows that the soak process should go up to 392°F (200°C). A sample process win- dow may call for a max rising slope somewhere between 0 and 2.5 °C/sec- ond, a soak time between 311 and 365°F (155 and 185°C) of between 30 and 120 seconds, a time above reflow at 422.6°F (217°C) from between 30 and 100 seconds, and a peak tempera- ture between 446 and 482°F (230 and 250°C). Now consider ramp to peak/


spike. A sample process window might specify a max rising slope from 0.5 to 2 °C/second, time above reflow at 429.8°F (221°C) of between 45 and 75 seconds, a peak temperature of between 455 and 491°F (235 and 255°C) and a time from 77°F (25°C) to peak of between four and five minutes. In what is called “RTS Long


TAL,” a longer TAL and higher peak temperature is used. Here, there is an increase in TAL to 60 to 90 sec- onds. In addition, there is an increase in peak temperature to between 473 and 509°F (245 and 265°C). Care should be taken with this process window as the tempera- tures start getting dangerous for some components.


The Devil is in the Details Fine-tuning can take time, but


the results can be seen immediately. Using tools available on the market for this optimization process signifi-


Continued on page 58


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