technology  III-V microelectronics


Towards terahertz Armed with an InGaAs channel, these HEMTs are the most advanced device technology for building the upcoming terahertz monolithic integrated circuits (TMICs). That’s because they deliver high transistor gain at very high frequencies and produce the lowest noise figure of any active device technology. The key to these high speeds has been a cut in gate length (see Figure 1). Advancing beyond 200 GHz while maintaining reasonable gain was not trivial - it demanded proper scaling of the entire process parameters.


So at every technology node adjustments were made to the scaling rules of the gate-to-channel separation, source resistance, and electron density in the channel.


Increasing the indium content in the InGaAs channel has also helped to speed our mHEMTs (see Figure 2). Ramping the indium content to its upper limit to create a pure InAs film has increased electron mobilities and


Figure 2. Reduction in the gate size of Fraunhofer IAF’s transistors has been accompanied by adjustments to device design. This is evident in the layer composition of the 50 nm (a) and the 35 nm (b) mHEMT heterostructure. The 35 nm mHEMT layer sequence includes a double-side doped, single In0.80


Ga0.20 As channel to avoid short channel effects


delivered superior charge confinement. In turn, the transit frequency, fT


, of these mHEMTs has rocketed from


220 GHz for the 100 nm mHEMTs to 515 GHz for the 35 nm gate length devices. The faster variant can hit a drain current, Id


, as high as 1600 mA/mm at a drain voltage of


1 V, thanks to a very low source resistance of only 0.1 Ω.mm. Both of the mHEMTs feature a 250 nm-thick MOCVD-deposited SiN layer, which is employed in all our devices.


Figure 3. Fraunhofer IAF has fabricated a MMIC chipset for broadband performance at 300 GHz. This is based on active circuit concepts and employs 100 and 50 nm gate-length mHEMT technology. The chipset incorporates a low-noise amplifier, resistive mixer with integrated frequency-doubler, LO power amplifier and frequency-multiplier-by-six. The role of the balanced active frequency-multiplier-by-six is to provide 0 dBm of output power in the 110 to 152 GHz range. When directly driven by the multiplier output power, the combination of frequency doubler and resistive mixer produces a conversion loss of 20 dB. With the intermediate LO power amplifier, conversion loss is reduced to only 12 dB across the 260- 308 GHz frequency range. The LNA provides pre-amplification by 20 dB at 290 GHz with an estimated noise figure of 7.5 dB. This takes the overall receiver performance to a maximum conversion gain of 8 dB.


22 www.compoundsemiconductor.net October 2010


There is more to realizing an IC with terahertz capability than producing super-fast transistors. Adapted passive circuit elements are essential for confining electromagnetic fields and suppressing unwanted substrate modes. To meet these needs we employ a grounded coplanar waveguide topology with coplanar transmission lines on the MMIC front side, connected to grounded backside metallization with miniaturized through-substrate vias.


This topology also provides a low source inductance of the active devices, along with compact transmission line dimensions. The crosstalk within the circuits is minimized by cutting the coplanar line ground-to-ground spacing to 14 µm. This, in turn, slashes chip size. To suppress substrate modes, a small spacing between the through substrate vias is necessary. By reducing the size of the vias from 35 to 20 µm, enough of them can be accommodated in the miniaturized MMIC topology. The final substrate thickness is 50 µm.


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