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Page 42


www.us- tech.com


Los Angeles Office: 


  


Atlanta Office: 


  


  


Key Specifications:


•Reduced inspection programming times using Gerber data


•Geographical checks for component locations and profiles


•Reverse net generation allows addition of component connectivity info


•Organized component libraries output to Hioki 1240


Arsham Ahmadi, system designer, tests an electronic device.


tablet device, in-circuit testing, func- tional testing, tolerance sampling, and materials traceability. New product introduction (NPI)


 


Key Specifications: •Capable of fine-pitch inspection at 0.2 mm


•Four-terminal resistance measurement between IC leads and pad to detect insufficient solder


•Soft landing feature to prevent board damage


•Supplementary AOI functions including component presence polarity and displacement


•Test resistors, capacitors, diodes, zener diodes, coils, transistors, digital transistors and photocouplers


•Optional CAD conversions •User friendly Windows operation User-friendly Windows operation


is often the most challenging stage of manufacturing. CE3’s production engi- neering team works to make this process effortless through clear engi- neering-to-customer communication. Frequent high-level communication re- duces time to market and eliminates the associated costs of stumbling through manufacturing without direc- tion.


It is the company’s goal to en-


annual sales tripled and a staff of 110, CE3 now serves markets across much of North America. Thus far, the key to the compa-


ny’s success has been its commitment to personalized customer service. With a model focused entirely on its clients, the company is well-positioned to con- tinue its healthy growth. Contact: CE3 Electronics, Inc.,


1055 Aviation Avenue, Dieppe, New Brunswick, Canada, E1A 9S5 % 506-858-7817 fax: 506-877-0730 E-mail: raymond.kaps@ce3electronics.com Web: www.ce3electronics.com r


JTAG Visualizer Update Adds Faster Debugging


Easton, MD — JTAG Technologies has introduced the latest version of its Visualizer graphical viewing soft- ware tool for PCB layouts and schematics. The program allows users to quickly assess fault coverage data and to pinpoint test faults. The software has a wide range


of CAD (EDA) tool import filters. Users can import schematic data di- rectly from Mentor (Pads, DxDesign- er, Capture), Cadence, Altium, and Zuken tools, as well as board layout information in ODB++ and a dozen other vendor-specific formats. The new maps feature, intro-


duced in this version of Visualizer, offers a basic test-accessibility view at the click of a button. The view can be fine-tuned by adding a few compo- nent descriptions to a look-up table. Color-coded schematics can be dis- played or printed by using customiz- able colors to indicate test coverage or access types. Once the design has been optimized for boundary scan test coverage and committed to lay- out, final application development can begin with JTAG’s ProVision de- veloper tool. The software includes a range of


Visit us at www.seikausa.com to see more of our products!


ik


new features. When running a test sequence, or during test debug with- in ProVision, it is now possible to


view all failing circuit nets in a schematic view, layout view or both, automatically. This “visualize on (test) fail” feature is excellent for small-scale production systems, where the test operator is also re- sponsible for fault diagnosis and re- work. During fault finding, a new “lo- cate next” feature allows the user to track the course of a net connection through the layers of a PCB layout or the sheets of a schematic. Users can now define multiple


color themes for distinguishing dif- ferent net classifications. This can be used for percentage fault coverage schematics or fault nets in layouts to aid in debug and repair. A highlighted fault net can now


be viewed along its entire path and as it changes course through the PCB layers. In addition, notes can be added anywhere at a fixed position on the schematic or layout. This is useful for conveying additional infor- mation about test processes or for passing design details back and forth between users. Contact: JTAG Technologies,


Inc., 111 N West Street, Suite A, Easton, MD 21601 % 410-770-4415 fax: 410-770-4774 E-mail: info@jtag.com Web: www.jtag.com


December, 2017


Individualized Customer Service Key to EMS Success


Continued from page 40


programming, and testing. Quality Management The company has made consid-


erable investments in quality man- agement tools and systems. Quality processes include: 3D AOI, X-ray in- spection, monitored aqueous PCB washing, meticulous work instruc- tions for each operator delivered by a


sure that supply chain requirements for each client are secure and stable, and that the customer is completely satisfied. This customer-centric focus has earned CE3 Electronics extreme- ly long-term relationships with much of its customer base. The company is on solid finan-


cial footing and is fully prepared to invest in any new tooling and equip- ment as customer needs arise. With


NEW


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