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Special packaging feature: Imbedded Component/Die Technology: Is it ready for mainstream design applications?

Special packaging feature:
Imbedded Component/Die
Technology: Is it ready for
mainstream design applications?
by Casey H. Cooper, Mark T. McMeen and Jim D. Raby, STI Electronics, Inc., Madison, Alabama USA
introduction
Imbedded Component/Die Technology
Current design problems The electronics industry has seen an
(IC/DT®), which imbeds actives (bare die)
are not driven by circuit
explosion in development of new materials
and passives in cavities within the printed
design capabilities but by an
and processes to support the demand for circuit board (PCB)
2
.
inability to reliably package
“smaller, lighter, faster, and better” prod- In a paper presented at SMTA’s Pan
these circuits within size and
ucts
12
. In the high reliability electronics Pacific Conference in 2004, the features
weight requirements (SWAP)
sector, military and aerospace electronics and advantages of imbedding active and
providers continue to push the techno- passive components were presented
3
. Over
outlined by the system level
logical envelope using these new materials
the last four years, STI has since completed
specifications. Innovative
and processes to design and manufacture
development of an imbedded die manufac-
packaging techniques are
leading edge electronics for today’s users.
turing process and patented
4
this unique
required in order to meet
These advanced electronic assemblies are
packaging technology coined Imbedded
the increasing size, weight, necessary to enable the leap-ahead that is
Component/Die Technology or commonly
power, and reliability required of today’s military hardware to
referred to as IC/DT®. Imbedding unpack-
requirements of the DOD
better equip our nation’s defense.
aged components, i.e. bare die, enables the
without sacrificing electrical,
Current design limitations are not
miniaturization of electronics hardware
mechanical, or thermal
driven by circuit design capabilities but
that current packaging technologies, such
performance. Imbedded
by an inability to reliably package these
as SMT, cannot provide.
circuits within the space constraints. As
Today we have achieved a TRL 8 on
Component/Die Technology
system designers continue to integrate
this IC/DT technology after successfully
(IC/DT®) addresses these
more capabilities on a single platform,
demonstrating successful flight of a SM-2
design challenges through packaging engineers are tasked with the
MISSILE utilizing IC/DT designed hard-
imbedding both active and responsibility to ensure reliable electrical,
ware as well as kicking off a number of new
passives into cavities within
mechanical, and thermal performance in
designs utilizing this design concept. The
a multi-layer printed circuit
the field. Innovative packaging techniques
answer is yes main stream design engineer-
board to decrease the surface
are required in order to meet the increasing
ing is ready for the integration of IC/DT®
area required to implement
form, fit, and function requirements of this
into future designs needing the ability
industry without compromising reliability
to meet SWAP—size, weight and power
the circuit design and increase
and robustness.
reduction—to meet future system level
the robustness of the overall
Over the last decade, packaging
requirements requiring SWAP initiatives.
assembly. technologies have seen a shift in pursuit of
achieving these requirements through the
Technology description
use of 3D integration
1
. Whereas most new
This Imbedded Component/Die Tech-
products have defined X and Y dimen-
nology (IC/DT®) packaging approach
Keywords: Size, Weight, Power,
sions, added capability is left confined
addresses miniaturization, thermal manage-
to integration within these boundaries,
ment, performance, reliability, and system
Reliability, Hi-Rel, 3D Assembly,
forcing engineers to rely on miniaturiza-
capability requirements through innovative
Cavities, Thermal Core, Imbed-
tion that can only be achieved through
design guidelines and materials selection
ded Components, IC/DT, and
using the smallest form and fit factor in order to meet form, fit, and function
SWAP
components and interconnection in the Z requirements
12
. Elimination of external
direction. Packaging technologies are being component packaging not only reduces
employed that integrate bare die of both ac- circuit card assembly (CCA) size, weight,
tives and passives into package designs such and electrical and thermal parasitics, but
as Multichip Modules (MCMs), System-
Originally published in the Proceedings of the
it enables the 3D assembly of multiple com-
in-Package (SiP), Chip-on-Board (COB),
SMTA International Conference, Orlando,
ponents facilitating the design integration
and emerging system-level designs such as
Florida, August 17-21, 2008.
of key subsystems, i.e. multiple CCAs, into
28 – Global SMT & Packaging – September 2009 www.globalsmt.net
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