A baseline study of stencil and screen print processes for wafer backside coating
A baseline study of stencil
and screen print processes
for wafer backside coating
by Jeff Schake, DEK USA, Inc., Flemington, NJ, USA
introduction
wafers.
The application of adhesive
Much of the development in today’s
The deposition of wafer level die
materials on the non-active
electronics packaging is focused
attach adhesives by screen printing is one
side of silicon wafers can
towards adding value at the wafer level,
of several applications representing the
serve as B-staged die attach
motivated by opportunities to reduce
broader category of large format coatings
or provide a protective laser-
manufacturing cost while continuing to
this process addresses. Typical performance
improve performance. This has resulted
markable cover layer that
criteria associated with printed coatings
in convergence of semiconductor
safeguards it from damage in
include thickness (or thinness), uniformity,
manufacturing and final assembly in
dicing. Traditional solder paste
design and deployment. Productivity
stencil printing equipment
can be further optimized through the
Material A B
can be used to deposit such manufacturing efficiencies gained by the
Function Wl Die Protection
adhesive coatings on wafers.
use of traditional final assembly equipment
Attach
This paper reports results of
in wafer level processes.
Viscosity 42,000 cps 4,000 cps
dedicated screen and stencil
For example, die attach material can
print baseline testing for the
be conveniently introduced to the silicon Specific 1.5 g/cc 1.8 g/cc
wafer backside coating process.
while still in wafer form. The individual Gravity
Two commercially standard,
finished packages supplied to final
Color Yellow Black
assembly with this feature, now pre-applied,
nonconductive epoxy-based
facilitates removing a manufacturing step.
Conductive No No
materials of quite contrasting
Furthermore, any yield loss attributed to
B-Stage Yes No
rheologies are compared in
former dedicated die attach deposition
Capable
trials consuming 48 200
processes is also eliminated due to only
mm diameter wafers. Deposit
Snap Cure Yes No
known good die (KGD) being used.
thickness planarity across the
Capable
Conventional back-end methods
wafers is a key metric used
of applying die attach material include Table1. Print material properties.
to evaluate the performance
dispense, pin transfer, and screen printing.
of the coating process. Print
Wafer level die
coating surface roughness
attach employs dry
trends are also presented.
film lamination, spin
coating, or screen
This study demonstrates
printing. Screen
coating coplanarity success
printing offers the
accomplishing ±12.5 µm @ 6
only process capable
sigma control down to 30 µm
of managing both
cured thickness. options. While fast
enough to comply
with line speed
Keywords: Wafer Backside
requirements in
Coating™, Thin Film, Die
final assembly,
Attach, B-Stage, Printing
this process is also
capable of delivering
accurate material
This article was presented as a paper at
volumes on delicate
the International Wafer-Level Packaging
semiconductor
!
Conference, held in San Jose, California,
devices, such as
Table 2. Test variables.
October 13-16, 2008.
14 – Global SMT & Packaging – September 2009 www.globalsmt.net
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