news digest ♦ Equipment and Materials photolithography processes.
SSEC unveils single wafer wet processing solutions for III-Vs
Unique configurations improve process control, lower CoO, and bring higher throughput
Solid State Equipment LLC (SSEC) has introduced its WaferEtch and WaferStorm product lines.
These platforms are specifically configured to meet the process needs of applications in compound semiconductor, advanced packaging and MEMS manufacturing. These tools aim to improve process control and reduce chemistry consumption, translating to higher throughput and lower cost of ownership (CoO).
One key CoO reduction driver was enabled by an engineering break-through that makes the chambers more compact and stackable. This results in 50 percent more process chambers within the same small footprint of the legacy products.
The WaferEtch platform is configured for aqueous-based etch processes such as through-silicon via (TSV) reveal. The WaferStorm platform is configured for solvent-based processes such as resist strip, metal lift-off, and TSV cleaning.
“Superior performance, improved yields, and increased throughput at a lower CoO are the cornerstones of SSEC’s single wafer wet processing approach,” says Laura Rothman Mauer, Chief Technical Officer of Solid State Equipment LLC.
She adds, “We have worked closely with our customers to develop practical solutions to some of the industry’s toughest manufacturing challenges in 2.5D and 3D ICs, MEMS, and compound semiconductors. The launch of these preconfigured product lines is the culmination of this work, and we are excited to bring these innovations to market.”
WaferEtch
The WaferEtch platform is an aqueous-based, customisable platform uniquely configured to meet the needs of specific etch applications for compound semiconductor, 3D ICs and MEMS processes. These systems use a wet etch process chemistry that demonstrates optimal etch rate and in situ cleaning.
WaferEtch TSV REVEALER
The flagship of the WaferEtch platform, te TSV REVEALER, is specifically configured to address the requirements of TSV reveal, which is the process where the backside of the wafer is thinned to reveal the copper interconnects. It has become a target area in the manufacture of 2.5D and 3D IC packaging for process control and cost reduction.
The TSV REVEALER replaces three tools required for the dry etch approach: plasma etch, silicon thickness measurement, and clean. An optical end point detection system with advanced algorithms determines when vias are revealed. Integration of a wafer thickness measurement sensor in the etch system provides closed-loop control of the etching process. The TSV REVEALER achieves a significant reduction in CoO making 3D TSVs more economically feasible.
WaferStorm
The WaferStorm platform is a solvent-based platform, initially available in three unique configurations: TSV CLEANER, METAL LIFTER, and DRY FILM REMOVER. All WaferStorm systems are based on SSEC’s unique soak and spray technology, which provides improved performance at lower CoO than conventional wet bench-only or spray-only approaches.
The process combines equal soak time in the wet buffer tank for each wafer, followed by spray, and then a final step depending on the process being performed. This unique combination minimizes both spray time and chemistry use, and adds a significant level of process control. The reduction in spray time results in increased throughput.
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www.compoundsemiconductor.net August/September 2013
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