news digest ♦ LEDs


Azzurro simplifies GaN-on-Si LED growth


The Dresden based firm is marketing 150 mm GaN- on-Silicon templates to LED manufacturers


Azzurro has released a white paper describing the easy migration of LED manufacturing to GaN-on- Silicon.


The company says its 150 mm GaN-on-Silicon templates will lead to very short design-in times.


The schematic below shows a comparison between a sapphire based LED structure and the silicon based template as shown in the firm’s white paper.


[Image Courtesy of Azzurro]


Commenting on the huge cost saving opportunities, Markus Sickmoeller, VP Operations at Azzurro Semiconductors says, “Our plug-and-play approach, supported by our application note and engineering support assures a smooth migration from the legacy materials towards GaN-on-Silicon with easy to process, larger wafer sizes in standard silicon processing lines at much lower costs.”


[Image Courtesy of Azzurro]


The white paper outlines how to overcome the technical hurdles associated with migrating to GaN-on-Silicon. It also covers key achievements possible when using the right technology, details the advantages for the move to GaN-on-Silicon obtainable with templates and shows development solutions to the LED epitaxy engineer.


The detailed data of GaN-on-Silicon products is also revealed regarding high crystalline quality. The described EPD of the described devices is 2 x 108cm-2, with a wavelength of less than 4 nm and bow values of less than 20 μm.


Enabled by Azzurro’s thick GaN-buffer as well as its patented and proprietary strain-engineering technology, these achievements permit the full utilisation of the advantages of GaN-on-Silicon. These include reduced binning due to superior homogeneities among other things.


What’s more the large wafer diameter and low bow values allow the use of standard silicon processing lines which are offering cost breakthroughs for


68 www.compoundsemiconductor.net October 2012


As part of easing the move to GaN-on-Silicon, Azzurro is delivering standard migration packages to customers which include dedicated engineering support from its team of experts.


There are a number of players in the GaN-on- Silicon market.


Toshiba together with Bridgelux’s technology is launching a 200mm (or ~ 8”) pilot line in north Japan in October. UK based Plessey is another new contender, and is developing a 150mm GaN- on-Silicon process with the help of Cambridge University spin-off CamGaN. With its massive Aixtron CRIUS II-XL reactor which is capable of growing 7 x 150mm (or ~ 6”) wafers, which has only recently been installed, Plessey is aiming at volume manufacturing in the next few months.


EpiGaN, based in Belgium and set up by former imec researchers, is another spin-off working on 8 inch GaN-on-Silicon. Imec itself is involved in growing 8” GaN-on-Silicon for both power devices and LEDs with investments from major industrial partners such as Samsung.


Also in the last week, Veeco announced that wafer processing and back-end manufacturing.


The diagram below shows the typical lattice mismatch and Azzurro buffer technology which compensates for the induced stress.


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