INDUSTRY GaN DEVICES
which includes smaller wafer sizes. In addition to the high crystal quality of the buffer, it is sufficiently flat to allow our epiwafers to be run through a silicon line. Measurements on 90 wafers show that all of them are suitable for processing (see Figure 2 b).
Another essential characteristic for all GaN-on- silicon epiwafers, if dedicated to power switching devices, is a low leakage current at high voltages. We determine whether our wafers meet this criterion by applying a voltage between two isolated metal pads. At 1100 V – the limit of our system − leakage measured over 20 structures across the wafer is uniform, and well below a typical spec of 1 μA/mm.
Figure 1. imec’s 200 mm GaN-on-silicon platform, which can be used to manufacture a wide variety of devices.
Silicon foundry suitability Flat wafers are not the only consideration when processing GaN-on-silicon wafers in silicon lines. Engineers working in these fabs are very concerned over the use of gallium, which can contaminate the lines, because this element is a p-type dopant in silicon.
At imec, we have faced this issue, with the device processing team that is keen to to push GaN in the line working together with the contamination team. Together, we have found ways to prevent gallium contamination, which opens the door to putting GaN-on-silicon wafers through the lines after standard silicon lots.
A second challenge that we have faced in introducing our GaN technology in a CMOS line is associated with the contacts: they must be as good as those that include gold, but are free from this element. We have succeeded in this endeavour, producing gold-free ohmic modules with very little variation in contact resistance and a high level of reproducibility from wafer to wafer (see Figure 3). These contacts are reliable under high current density and high temperature conditions, and with an annealing temperature for the module below 600°C, they offer flexibility in process integration.
Following optimisation of the general processing modules, such as ohmic contacts and passivation, device engineers working with us, in synergy with processing engineers, can optimise their device technology. Support for this effort comes from intense TCAD and modelling activity.
Figure 2. The 200 mm GaN-on-silicon wafers produced at imec have a buffer with excellent material quality, according to X-ray diffraction measurements (a), and a very low level of wafer bow (b). Bow must be below 50 µm bow for processing in a silicon line.
Our 200 mm GaN-on-silicon platform can be used to form a range of power switching devices: depletion mode (D-mode) MISHEMTs; enhancement mode (E-mode) MISHEMTs and J-HEMTs; and power Schottky diodes, which are standalone devices that are compatible
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www.compoundsemiconductor.net October 2014 Copyright Compound Semiconductor
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