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October, 2024
Interface Analysis: Local PCB Warpage with AI and Large Area BGAs
By Neil Hubble, President, Akrometrix T
he shape, or warpage, of a printed circuit board (PCB) has always been a key vari-
able for reliable electronics assembly, more notably since the use of surface mount compo- nents. However, concerns over warpage, and in particular warpage over temperature, have more commonly focused on the component rather than the PCB.
As the industry faces much larg- er components, such as those used in data centers and Artificial Intelligence (AI) appli- cations, this paradigm of mostly ignoring PCB warpage seems to be changing.
Warpage Challenges When parts are made of
materials with varying thermal
expansion characteristics, quan- tified by Coefficient of Thermal Expansion (CTE), and they are heated, such as in a reflow oven, those parts change in shape. Thus, surface mount devices such as a ball grid array (BGA) or land grid array (LGA) made of mixed CTE materials, often warp
perature. This is increasingly seen in telecom applications, servers, and AI applications who are utiliz- ing large and often multiple processors. While historically thermal warpage would be a com- mon test for these types of surface mount components, now manufac- turers are asking for PCB fabrica-
For all your workbench needs. Common surface mount defects.
due to the temperature seen inside of a reflow oven. This level of shape change is controlled via industry standards, from JEDEC (JESD22B112) and JEITA (ED7 - 306). Here rules are set for allow- able warpage based on feature diameter and pitch. However, for the PCB side of
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this attachment, rules are mini- mal. Some standards exist around overall PCB bow and twist, but warpage of the compo- nent attach area is only addressed in industry standard IPC-9641, wherein no pass/fail criteria is provided. The only reference to allowable PCB local area warpage levels is indicated by the JEITA package warpage standard which allows in their BGA standards “20 percent of the displacement is reserved for a tolerance of the PWB warpage and the fluctuation of the paste thickness.” As pack- ages continue to increase in size, manufacturers are finding this assumption to be invalid. Regardless of industry stan-
dards, manufacturers who are uti- lizing increasingly larger BGAs are already testing for the shape of both BGA and PCB over tem-
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tors to measure for thermal warpage specific to the local areas where large BGA will be attached.
Shadow Moiré and Interface Analysis
The solution to managing
thermal warpage challenges of large components is provided by Akrometrix in its thermal war - page metrology solutions and specifically with its Interface Analysis (IA) software, wherein both BGA and PCB are matched in-situ for shape across tempera- ture. First component and PCB are measured independently for shape over temperature using the shadow Moiré warpage measure- ment technique. This technology is uniquely
suited for precise warpage reso- lution across larger area sam- ples, such as the large PCBs found in AI and telecom applica- tions. Shadow Moiré technology can provide sub-micron warpage resolution across server sized PCBs, acquiring full field data sets in only a second or two. Full field and high speed are essential criteria for metrology used to Continued on next page
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