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TECHNOLOGY MICROELECTRONICS


The fabrication processes that we employ are very similar to those associated with silicon CMOS. For both n-type and p-type FETs, sputtering forms the refractory gates. After etching close to the quantum wells, ion implantation defines the source and drain regions and the laser apertures for VCSEL current steering. High-temperature annealing follows, before implants are metalized and interconnected.


Figure 4. Transfer characteristics of a cHFET complementary invertor formed with POET technology.


wavelengths, such as those around 1.5 μm. For an in-plane laser, the preferred implementation is a closed loop resonator. Output is directed into a straight waveguide, which has losses that are trimmed through novel implant techniques.


One of the strengths of this design is the great flexibility of the resonator: It can be varied from a large perimeter, rectangular design that features conventional wave-guiding for increased laser output power to a small perimeter circular resonator, which is based on whispering gallery mode (WGM) wave-guiding, and delivers a greatly reduced output power. These structures are ideal for optical filtering, wavelength-division multiplexing operations and slow light control.


It is also possible to build absorption modulators, detectors and optical amplifiers from the HFET structure used for the laser. Typically, these are implemented in a linear waveguide geometry, because a cavity is not required (see Figure 1). However, it is essential to control the absorption profile via the applied voltage, because this enables voltage control of the refractive index. With the POET platform this requirement is met, because injection of charges leads to a blue shift in the absorption edge (see Figure 2).


Conventional processes We produce our devices by MBE, the only deposition process providing precision doping, thickness control and laser quality. This particular epitaxial process is also unmatched in its ability to realize self-assembled quantum dots. To trim growth times, we use various approaches, such as the deposition of top mirrors.


Addition of the metal enables electrical devices, and also allows injection and extraction of carriers in a variety of optical waveguide devices, including detectors, modulators, amplifiers and directional couplers. Etching through to the bottom mirror isolates all devices.


When we started our development effort, we used a 1 μm gate size, but more recently we have scaled to 100 nm. Currently nFETs with an effective gate length of 0.6 μm and a cut-off frequency of 42 GHz.


Structures that we have made include an inverter (see Figure 3 for an example). This device can exhibit the ideal behaviour required for complementary operation (see Figure 4). Other efforts by us include integration of the laser and the detector to form the transmit and receive functions in a vertical cavity format (see Figure 5).


Our development programme has enabled stabilisation of the fabrication and growth platform, and we are now in a position to develop a full suite of optoelectronic devices. We can now fabricate logic blocks based on cHFET designs, while simultaneously developing optical input/output blocks, which require novel spot-size converters to realise low insertion loss to/from fibres in a low-cost package.


Further scaling of our device portfolio is required. That should not prove too tricky, as based on our preliminary work on logic devices with 100 nm feature sizes, it is clear that the our devices will also scale down to 15 nm and even 10 nm − just as silicon is doing now.


While scaling is important, it is by no means our only goal. It turns out that the modulation-doped interface formed with our technology, which is a normally off channel, is ideal for the implementation of the single electron transistor. This form of transistor can access engineered quantum dots at the interface, which have quantum levels differentiated by spin. It is possible that these single electron transistors could aid the development of quantum computing, with electron spin providing the quantum variable to form quantum computing logic blocks.


Thus our POET technology could provide a chip environment for conventional logic and optoelectronics that serves the computers of today, while providing a bridge between the quantum computing function with qubits and the real world of classic logic with its binary numbers.


Figure 5. An integrated transmitter (a) and receiver (b) formed with POET technology.


56 www.compoundsemiconductor.net June 2014


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