Feature: Electronic design
stages. Tis is effectively a single voltage gain stage since all the gain is generated by the folded cascode part of the circuit. Note that although the folded cascode parts here are usually
resistively biased this is not recommended, and active current sources are used instead because this maximises the impedance at the output of the conjoined collectors of the complementary common base stages; see Figure 5. Tis could maximise the forward-path gain, provided a very high input impedance (at least 20MΩ) is used across the audio band. None of the transistors in the arrangement of Figure 4 is
phase inverting; consequently, Miller minor negative feedback loop compensation cannot be applied, hence its linearising and “pole splitting” benefits are unavailable. Indeed, this amplifier’s major feedback loop may only be compensated by two methods: a shunt capacitor to ground from the conjoined collectors of the complementary common base stages and the application of series-derived, series-applied minor loop degenerative feedback, courtesy of the resistors in series with the emitter of each transistor in the complementary differential stages. For a fair comparison with the circuit of Figure 1, the circuit
of Figure 4 (and all subsequent amplifier circuits discussed here) was compensated to give precisely the same unity major loop gain frequency and major loop gain at 20kHz as those of Figure 1; see Figure 6. Despite having the same major loop gain at 20kHz as the circuit of Figure 1, for 20.6V peak output, the single stage circuit of Figure 4 gives 0.04% total harmonic distortion at this frequency, more than a hundred times worse than that generated by the two-stage circuit of Figure 1. Tis result shows that the forward path of the circuit of Figure 4
is far less linear than that of Figure 1, due in part to the loading of the shunt compensation capacitor on the conjoined collectors of its complementary common-base stages and the fact that balance of the collector currents in the differential stages cannot be guaranteed. Moreover, the greatly reduced major loop gain of the circuit of Figure 4 compared to that of Figure 1 at low frequencies suggests that the power supply rejection of the former is likely to be worse than that of the latter.
Single-stage differential folded cascode voltage amplifier variations Te commonly-used circuits of Figures 7 and 8 considered by some to be two-stage amplifiers, presumably because their complementary output transistors are differentially driven. However, the voltage drive to the bases of the complementary output transistors is insignificant, being tens of millivolts across the audio band. Consequently, these modifications are largely cosmetic, and the output impedance, major-loop gain and closed- loop linearity of these amplifiers are virtually identical to those of the simpler circuit of Figure 4. Contrary to popular opinion, therefore, the circuits of Figures 7
and 8 are effectively single-stage voltage amplifiers. Although some think that Miller minor loop feedback
compensation may be implemented in these arrangements, as shown in Figure 9, the combined value of these capacitors needs
46 December 2021/January 2022
www.electronicsworld.co.uk
to be roughly the same as the single shunt compensation capacitor to ground in the circuit of Figure 4, if the same major loop gain is to be obtained. Tis suggests that, in this case, Miller magnification of the compensation capacitors does not occur to any significant extent and minor loop gain is negligible. Were this not the case, the compensation capacitors used in Figure 9 would be much smaller than the shunt compensation capacitors used in the circuits of Figures 7 and 8 for the same major loop gain. Terefore, there is little to be gained from this device.
A novel two-stage folded cascode topology Clearly, for best performance, particularly with respect to linearity, a true two-stage design such as that of Figure 1 is required. However, this circuit tends to slew asymmetrically, considered an “inelegant” solution. Te circuits of Figures 4, 7 and 8 tend to slew symmetrically, but their linearity is mediocre at best. Terefore, to virtually eliminate slew asymmetry while retaining acceptable forward-path linearity and enough forward-path gain, a two-stage topology with a push-pull transimpedance stage (TIS) is required; see Figure 10. In this circuit, the input TAS consists of a differential stage
driving a pair of common-base stages in a folded cascode arrangement, in which the collector outputs of the common-base stages are connected to a current mirror to give a single-ended current output. Te TIS is merely the complement of the TAS, with the crucial and novel difference that its non-inverting input is grounded. Tis simple contrivance forces the quiescent voltage at the TIS’s inverting input – which, obviously, is also the quiescent voltage at the output of the TAS – to roughly ground potential, while 100% DC major loop negative feedback is relied upon to fix the quiescent voltage at the output of the TIS also to ground. Unlike the circuit of Figure 1, the TIS in this topology provides
true push-pull action, virtually eliminating slew asymmetry; however, for the same major loop gain as the circuit of Figure 1 and 20.6V peak output, the circuit of Figure 10 gives total harmonic distortion of 0.0006% at 20kHz, which is twice the distortion generated by the circuit of Figure 1 at the same frequency while using more than twice the number of components. Tis is certainly not a short-signal-path design. Moreover, the output impedance of the cascode TIS of Figure
10 is approximately 164kΩ at 20Hz (Figure 11) with single-pole minor negative feedback loop compensation, more than 440 times the output impedance of Q8 in the preferred topology of Figure 1 at the same frequency. Terefore, the Figure 10 TIS should be connected to an output-stage voltage buffer with an input impedance of at least 2MΩ throughout the amplifier’s output voltage swing, if the voltage dropped across its output impedance is to be insignificant and maximum voltage transfer from the TIS to the output of the amplifier is to be achieved at low audio frequencies. To eliminate the non-linear loading of the output stage on
the cascode TIS of Figure 10 requires the insertion of a Class-A MOSFET source follower, ideally biased by an active current source between the cascode TIS and the output stage. Tis has
Page 1 |
Page 2 |
Page 3 |
Page 4 |
Page 5 |
Page 6 |
Page 7 |
Page 8 |
Page 9 |
Page 10 |
Page 11 |
Page 12 |
Page 13 |
Page 14 |
Page 15 |
Page 16 |
Page 17 |
Page 18 |
Page 19 |
Page 20 |
Page 21 |
Page 22 |
Page 23 |
Page 24 |
Page 25 |
Page 26 |
Page 27 |
Page 28 |
Page 29 |
Page 30 |
Page 31 |
Page 32 |
Page 33 |
Page 34 |
Page 35 |
Page 36 |
Page 37 |
Page 38 |
Page 39 |
Page 40 |
Page 41 |
Page 42 |
Page 43 |
Page 44 |
Page 45 |
Page 46 |
Page 47 |
Page 48 |
Page 49 |
Page 50 |
Page 51 |
Page 52 |
Page 53 |
Page 54 |
Page 55 |
Page 56 |
Page 57 |
Page 58 |
Page 59 |
Page 60 |
Page 61 |
Page 62 |
Page 63 |
Page 64 |
Page 65 |
Page 66
