FEATURE TEST & MEASUREMENT Debugging DDR memory interfaces
Dean Miles, technical marketing manager at Tektronix, explains how to debug DDR memory interfaces using area-based triggers
D
DR bus protocol allows signals to go idle, or tri-state, when they are not
active. When debugging or performing JEDEC conformance measurements on the DDR interface, it is often necessary to perform certain measurements only on qualified portions of the signal acquired using an oscilloscope, such as during READ or WRITE bursts or on bus transactions to a specific rank. However, capturing and finding the correct sections of the waveform for analysis on the DDR interface is challenging as it can require collecting and sorting through thousands of acquisitions for the event of interest. Defining a trigger that isolates the desired event and shows only asserted signal states greatly speeds up the debug and characterisation of memory interfaces; and area-based triggers are available for this purpose. As an example, Tektronix introduced this capability, known as Visual Trigger, as an option for its mid- and high-performance oscilloscopes last year.
AREA-BASED TRIGGER An area-based trigger is a post-processing qualification operation that occurs before the waveforms are available for storage, measurements or other analysis in the oscilloscope, thus ensuring that only the waveforms of interest are retained. The area-based trigger system provides
an intuitive method of triggering based on shapes created on the oscilloscope’s graticule. Areas can be created in a variety of standard shapes including triangles, rectangles, hexagons, trapezoids, or user-defined shapes to fit
the area to the particular trigger behaviour desired. Once shapes are created on the oscilloscope’s display, they can be positioned or re-sized dynamically while the oscilloscope is running. For additional insight, an area-based trigger can be combined with other oscilloscope trigger systems and can act as a Boolean logic qualifier for ‘A’ and ‘B’ events.
ISOLATING BURSTS ON A DDR BUS DDR READ and WRITE operations are burst oriented. The burst length is programmed during initialisation by writing to the appropriate bit fields in the MRS registers. The operation begins with a READ or a
WRITE command along with the column address targeted at the active open row. After a delay specified by READ/WRITE latency, the data appears. There are several differences in the signalling between the two cycles that can be used to setup trigger conditions to isolate and trigger on bus events of interest. • Polarity of the DQS pre-amble – For DDR3 and LPDDR3, negative on READ vs. positive on WRITE; For DDR4, both READ and WRITE are positive.
• DQS and DQ phase alignment differences – Edge aligned for READ; Centre aligned for WRITE.
• CS for qualification of bus transactions to a specific rank. • READWRITE signal amplitude based on the oscilloscope probe point location.
ISOLATING ONLY READ OR WRITE BURSTS In Figure 1, Channel 1 in yellow is the DQS strobe and Channel 2 in blue is the
Figure 1. Using area-based triggers to block out WRITEs and only trigger on READs
Figure 2. This area-based trigger is setup to isolate on a DQ bit pattern of 001001X
DQ data bit. A simple edge trigger has been defined for the channel connected to the DQS strobe. Without any qualification, the hardware trigger will capture both READ and WRITE bursts. Using an area-based trigger, one may isolate bursts based on pre-amble polarity and DQ/SQS phase alignment to either trigger only on READs or only on WRITEs. A number of steps are used to
configure screen areas to trigger on READs, or reversed for WRITEs: • Areas A1 and A2 are set so that when a signal is captured there is no DQS signal in these regions. This ensures that DQS is captured coming out of tri-state.
• Area A3 is set to filter out positive pre-amble events (WRITE), and only show negative polarity pre-amble events (READ).
• Areas A4 and A5 are set so that DQ signal does not to enter these regions, ensuring that the DQS and DQ are aligned.
ISOLATING A SPECIFIC PATTERN There are cases when it is necessary to trigger on and isolate a burst with a specific pattern such as identifying crosstalk due to capacitive coupling on adjacent lines. Figure 2 shows an area- based trigger setup to isolate a WRITE burst with a DQ bit pattern of 001001X. The specific data pattern is defined using areas A4-A7 shown in blue. Figure 3 illustrates how a user-defined shape can be used to isolate on DQ bit pattern.
ISOLATING A SPECIFIC RANK An area-based trigger can be helpful in distinguishing signals from multiple
Figure 3. This area-based trigger is based on a user defined shape setup to isolate on a DQ bit pattern
30 JULY/AUGUST 2014 | INSTRUMENTATION
/ INSTRUMENTATION
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