Feature: T&M
Figure 8: INL/DNL performance, with the LTC6373 (gain = 1) driving ADAQ4003 (gain = 0.454)
evaluation board by removing the external decoupling capacitors on the outputs of the reference and LDO regulators that generate the on-board rails (REF, VS
+, VS -, VDD and VIO ). Figure 4 shows
that any spurs are buried well below -120dB in the noise floor, regardless of whether the external decoupling capacitors are used. The ADAQ4003’s small form factor enables a high channel
density PCB layout whilst mitigating thermal challenges. However, the placement of individual components and routing of various signals on the PCB is crucial. The symmetrical routing of input and output signals – whilst keeping the power supply circuitry away from the analogue signal path on a separate power layer with as large a trace as possible – is especially crucial, to provide low impedance paths, reduce the effects of glitches on the power supply lines and avoid EMI- type problems.
Driving the ADAQ4003 As discussed earlier, high input impedance frontends are typically required to directly connect with sensors. The majority of instrumentation and programmable gain instrumentation amplifiers (PGIAs) have single-ended outputs, which can’t directly drive the fully-differential data-acquisition signal chain. However, the LTC6373 PGIA offers fully-differential outputs, low noise, low distortion and high bandwidth, which can directly drive the ADAQ4003 without sacrificing precision performance, making it suitable for many signal chain applications. The LTC6373 is DC-coupled on its input and output with programmable gain settings (using the A2, A1 and A0 pins). In Figure 5, the LTC6373 is used in a differential-
input-to-differential-output configuration with dual ±15V supplies. The LTC6373 can also be used in a configuration of single-ended input to differential output, if required. The LTC6373 directly drives the ADAQ4003 with its pin is connected to
gain set at 0.454. The LTC6373 VOCM
ground, and its outputs swing between −5.5V and +5.5V (opposite in phase). The ADAQ4003’s FDA level shifts the outputs of the LTC6373 to match the desired input common mode of the ADAQ4003. It also provides the signal amplitude necessary to utilise the maximum 2 × VREF
peak-to-peak differential signal range of the ADC
inside it. Figures 6 and 7 show the SNR and THD performance
using various LTC6373 gain settings, while Figure 8 shows the INL/DNL performance of ±0.65LSB/±0.25LSB for the circuit configuration shown in Figure 5.
Figure 9: Simplified block diagram for a source measurement unit (SMU) 30 December/January 2023
www.electronicsworld.co.uk
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