Strain gage testing: the delta effect of thermal cycle testing
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Graph A. X-Axis Data Graph B. Y-Axis Data
duration of the strain at specific locations These environmental stress screens are use of delta data, which corresponds to
on the board during environmental ther- used to find the weak link in the design, maximum forces seen during temperature
mal cycle testing and thus can be related to e.g. component package type, board type cycling and corresponding time duration
its operational use in the field. and thickness, component location, board as it relates to temperature, gives one a
These accelerated environmental life mounting and assembly, overall design ro- visual understanding of the invisible forces
tests are used to validate and determine bustness, and overall performance, to meet of stress and strain that are being ap-
operational life and determine statistical the end design and performance objective. plied to certain locations on the designed
confidence of the component set chosen, The objective is to be able to quantify the electronic assembly. The use of delta data
component placement (location on the system design and its ability to meet its between peak X and peak Y data extremes
PCB), and overall performance of the de- fielded performance requirements. The use at a specific temperature point allows one
signed electronic hardware assembly. These of strain gage testing with accelerated life to understand and correlate strain forces
tests are usually performed using a thermal testing is the key to understanding design at a specific location and the ability to cor-
shock chamber, with or without random tolerance and performance expectations. relate it to specific component and board
vibration, to create the correct CTE as well Strain gage testing is now starting to failures.
as replicate the normal vibration as seen be used during these early test protocols to The lesser known element in strain-in-
in a fielded state. CTE movement is in- quantify strain and strain pathways as well duced failures is strain pathways on circuit
duced through thermal cycle temperature as strain time duration during temperature board assemblies. All printed circuit cards
changes which cause the solder alloys and cycling to understand and quantify failure once assembled with large heat sinks, large
corresponding interconnection medium, modes and mechanisms that manifest component packages and connectors create
component attachment leads, to expand itself 500/750 cycles to 1000/1500 cycles pathways for stress and strain to travel.
or contract depending on the temperature. into an accelerated thermal cycle test. These pathways can be amplified during
These temperature stresses cause not only Strain gages (Figure 3) are temperature temperature cycling and component loca-
the solder alloys and attachment mediums compensated (not all gages are temperature tions and component types will become a
to expand and contract but the PCB itself compensated but should be in temperature critical design element as to meeting or fail-
also expands and contracts which can cycle protocols) as to stay calibrated during ing a system design objective. The ability to
manifest itself as bowing and/or twisting a temperature cycle to insure repeatabil- understand component type and location
which also imparts undue stress and strain ity. Assemblies and material sets being and its overall robustness to the applied
onto the component attachment solder used within the assembly all expand and board stress due to component layout is
interconnections. These environmental contract at different rates and thus create usually a missing design element when
test conditions for temperature cycling strain and strain pathways which work laying out a board design. Thus, the ability
and/or shock are normally tested from a against the solder attachment material and to gather real data during system design
lower temperature range of -55°C to -40°C will ultimately fail over time due to fatigue analysis and physical testing is essential to
to a higher temperature range of +85°C, fracturing caused by CTE movement. The laying out a board that meets system design
+105°C, or +125°C with adequate dwell ability to understand and quantify peak-to- objectives for longevity and warranty expec-
time to insure temperature saturation of peak amplitude and strain duration during tation. The ability to change the placement
the intended temperature setting. This a temperature cycle will allow the designer location or counter stiffen an area can be
temperature saturation usually occurs in 15 to understand the amount of strain being all that is required to eliminate a potential
to 30 minutes at each extreme. Sometimes seen at a location. Empirical testing and latent defect area or component location.
in the testing is the random vibrational data is key to understanding a failure This understanding of strain pathway
test which induces a vibrational force that and failure mechanism as well as utilizing from a design layout has a corresponding
replicates what will be seen in a fielded corresponding strain gage data. It allows relationship to long term reliability. This
state. The vibrational test normally used designers the ability to correlate failure interrelationship of strain and pathway is
for standard application analysis is IPC– data, e.g. component type and location, to starting to be recognized as a major design
TM–650 NUMBER 2.6.9. This is a cycling strain rate data and time duration to better requirement in the industry and to end
test that runs 20 Hz to 2000 Hz and back understand the overall design and its abil- customers. This is especially true in high
to 20Hz for 16 minutes with 15 G inputs. ity to meet system design objectives. The density design layouts which are utilizing
12 – Global SMT & Packaging – February 2009 www.globalsmt.net
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