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NEW PLATFORM PROVIDES ACCESS TO 3D TECHNOLOGIES I


RT Nanoelec, an R&D consortium focused on ICT using micro- and


nanoelectronics, and CMP are launching a platform for multi- project-wafer, post-process 3D integration (3D-MPW). The new and disruptive 3D configurations and assemblies created by this IRT Nanoelec/CMP initiative are designed to promote 3D integration. This service extends CMP’s regular


MPW offering by using mature 3D post-process technologies at wafer level from IRT Nanoelec. These


technologies include through- silicon-vias (TSV, via last), fine-pitch vertical interconnects (micro pillar with solder) and specific finishing for 3D integration like under-bump metallurgy (UBM). These 3D modules will enable a wide


panel of new, full 3D architectures, like multiple-die stacking with flip-chip, side-by-side heterogeneous integration, and 3D partitioning of different CMOS dies issued from CMP runs. 3D integration is highly


complementary to traditional CMOS


scaling, and has very strong potential in terms of size reduction, heterogeneous integration, miniaturisation, performance improvements and, possibly, reduction of costs at the system level. The technology is now emerging in


more and more applications, such as FPGA, 3D memories and MEM, and involves wafer-level processing on dedicated runs. The new platform provides for the


first time access to post-process 3D technologies after regular CMOS MPW


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CEA-LETI LAUNCHES SILICON IC DESIGN CENTRE


CEA-Leti has launched its Silicon Impulse IC design competence centre, a comprehensive IC technology platform offering IC design, advanced intellectual property, emulator and test services along with industrial multi-project wafer (MPW) shuttles. The platform offers the full range


of Leti and List’s expertise in analogue, RF, digital and memory design and hardware/software- integrated solutions at the technology node that most cost effectively meets partner needs. The center combines


Leti’s large portfolio of novel technologies and novel low-power design solutions with a service for speeding integration of Fully Depleted Silicon-on-Insulator (FD-SOI) and other more advanced technologies (ReRAM, MEMS, 3DVLSI, Silicon Photonics), enabling heterogeneous low-power co-integration. These services are targeted to


enable the rapidly emerging third- generation information-acquisition and processing devices that are key to the Internet of Things (IoT).


“Pervasive wireless networking and groundbreaking low-power technologies are critical to widespread adoption of the IoT, because they improve the performance of portable devices and their network infrastructure,” said Leti CEO Marie-Noëlle Semeria. “With Silicon Impulse’s one-stop- shop platform, 28nm FD-SOI heterogeneous, low-power design becomes a reality for the IoT community. www.leti.fr/en


mPower Technologies Inc. is beginning to take pre-orders on its newest mPower portable jumpstarter. The Truck Jump is the revolutionary jumpstarter for large trucks and commercial operations. Only nine inches tall and weighing less than 4 pounds, the unit is a fraction of the size and weight of other products. But it packs an incredible 1000A for 12V and 500A for 24V battery voltage systems. The product has multiple electronic safety protection features and is an intelligent jumpstarter that can automatically detect the battery voltage system of the vehicle.


www.mpowertech.com DISRUPTIVE NANO W


elcome to the new and exciting inaugural launch


issue of Micro Matters, the by- monthly trade publication for all things micro, nano and MEMS related. This issue is full of ground


breaking technologies including a focus on the latest in wireless battery charging on p10 whilst a focus on p12 investigates how nanotechnology is advancing the medical industry. Precision manufacturing as


well as research and development plays a key role in the progressive flow of microelectronics, which are finding their way into a ever wider rage of applications.


Michelle Winny - Editor 4 SPRING 2015 | MICROMATTERS


Scannano and LFoundry have announced a strategic long term relationship to apply Scannano’s disruptive nano technologies to a wide spectrum of new product applications. The first of these new products will be a MEMS-based portfolio of pressure sensors. By using Scannono’s Deep Vacuum


Gap (DVG) and micro-membrane nano-technologies, the new pressure sensors will offer significant levels of high accuracy and miniaturisation with lower power consumption and multi-functionality. As a result, the new devices can be fabricated together with “application-specific integrated circuits (ASIC)” on the same chip using standard CMOS processes.


The DVG process will be used to create a tiny vacuum gap with very high accuracy of approx. 1nm. The gap will then be combined with a sensing membrane to measure pressures exerted on the membrane.


Because the deformation occurs in


the range of a few nanometers, a high degree of accuracy can be achieved in a single nano- dimensional device. Furthermore, because of its low power requirement, it can be integrated with other devices on the same chip. Applications for the new pressure sensors are widespread and include over 100 devices in a wide range of automotive and industrial products. Monolithic integration onto a


single chip enables state-of-the-art designs using standard CMOS processes. Automotive applications can include safety systems such as crash detection and tyre pressures and power train devices such as manifold and turbo air pressures. Industrial applications can include gas flows, level meters, altitude compensation systems and weather stations. Device design activities are already under way and manufacturing will commence at Foundry’s Italian facility in Avezzano near Rome. www.electronica.de


CVD Equipment Corporation will be entering into an industrial partnership with Penn State University. Through the National Science Foundation’s Emerging Frontiers in Research and Innovation (EFRI) program, Penn State University (PSU) has been awarded $1.96M for Two-dimensional Atomic-layer Research and Engineering (2-DARE). This PSU project, headed by Professor Joan Redwing, will leverage CVD Equipment Corporation’s engineering and manufacturing capabilities to advance the deposition technologies and processes for producing novel 2D materials beyond graphene. The main focus will be on developing and optimising the techniques for producing crystalline 2D transition metal dichalcogenides (TMDs).


www.cvdequipment.com


NuFlare Technology and SUSS MicroTec, are to combine their expertise in Photomask Equipment and process solutions. NuFlare will install a SUSS MicroTec MaskTrackPro bake and develop system into their main manufacturing fab, in Japan, in early 2015. The system is designed and manufactured to meet the demands for masks used in next generation Lithography.


www.suss.com / MICROMATTERS


runs, for proof of concept, prototypes and/or small series production. These 3D post-process


technologies require very limited re- design of existing chips, and will be initially used for specific CMOS nodes available at CMP. They may be extended in the future, depending on demand. CMP is responsible for supporting, checking and compiling the customer’s requests, while IRT Nanoelec will manage the 3D post- processing. www.irtnanoelec.fr/en


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