INDUSTRY ANALYSIS
Yole believes Cu pillar bumping, which is becoming increasingly popular for a wide variety of applications. The massive adoption of Cu pillars is motivated by a combination of several drivers, including very fine pitch, no UBM needed, high Z standoff, etc.
Cu pillar Flip-Chip is expected to grow at a 35 percent CAGR between 2010-2018 (in terms of wafer count). Production is already high at Intel, the #1 Flip-Chip producer - and by 2014, more than 50 percent of bumped wafers for Flip-Chip will be equipped with Cu pillars.
As early as 2013, micro-bumping for 2.5D & 3DIC, in conjunction with new applications like APE, DDR memory, etc., will boost Flip-Chip demand and create new challenges and new technological developments. Today, Flip- Chip is available in a wide range of pitches to answer the specific needs of every application.
The ultimate evolution in bumping technologies will consist of directly bonding IC with copper pads.
3D integration of ICs using this bump- less Cu-Cu bonding is expected to provide an IC-to-IC connection density higher than 4 x 105 cm-2, making it suitable for future wafer-level 3D integration of IC in order to augment Moore’s Law scaling. Taiwan is the #1 location for Flip-Chip bumping according to Yole.
The major OSATs are preparing to produce fcBGA based Cu pillar packages and won’t limit the reach of cu pillar bumping to fcCSP. This will allow every company involved in CPU, GPU Chipset, APE, BB, ASIC, FPGA and Memory to access Cu pillar Flip-Chip technology.
Cu pillar capacity is expected to grow rapidly over the 2010 - 2014 timeframe (31 percent CAGR), hitting ~ 9 million wspy by 2014 and supporting the growing demand for micro-bumping and advanced CMOS IC bumping.
In the mutating middle-end area, CMOS foundries now propose wafer bumping services (TSMC, GLOBALFOUNDRIES, etc.), as opposed to bumping houses,
which are dedicated to bumping operations (FCI, Nepes, etc.), and OSATs, which keep investing in advanced bumping technologies.
In 2012, OSATs owned 31 percent of installed capacity in ECD solder bumping and 22 percent of installed capacity in Cu pillar bumping. A full overview of 2012 installed capacities for all bumping platforms is provided in this report.
Regionally, Taiwan has the biggest overall bumping capacity (regardless of the metallurgy), with important capacity coming from foundries and OSAT factories.
Taiwan currently leads the outsourcing “solder & copper” Flip-Chip wafer bumping market. Flip-Chip market growth, spurred on by the emergence of the “middle-end” environment, has challenged traditional “IDM vs. fabless” supply chain possibilities more than ever before.
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www.siliconsemiconductor.net Issue I 2013
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