Feature: Embedded design
applications. Perhaps the most dramatic examples are in vehicle automation. The integration of AI into vehicle
ADAS capabilities and into fully autonomous-driving vehicles creates formidable design and system- verification challenges. Is the correct data reaching the SoC, and is it adequate for the needs of the AI model? Is it being adequately pre-processed? Are the hardware and software operating correctly? What is going on inside the AI model? And is the system safely controlling the vehicle? To answer these questions, let’s look
at two vehicle manufacturers: one working on next generation ADAS and one developing an autonomous vehicle. Each placed an FPGA-based prototyping system in-vehicle, using extension boards to connect the prototyping system into the vehicle’s network, cameras, sensors and actuators. The system is physically replacing the SoC under development. Each vendor has taken this test bed on
the road and is exploring their design in real-world traffic situations. In a different environment, a developer
of wireline communications SoCs is using extension cards to integrate their FPGA prototype into an environment of multiple high-speed connections. They are observing the prototype’s behaviour in response to multiple concurrent high- speed data streams, while enjoying high prototype speed and rapid, automatic synthesis and mapping of the design onto the prototype when changes are necessary. As a fi nal example, consider a storage
system. T ese designs combine interfaces to fast buses, connection to multiple types of memory and timing-critical control, along with demanding computational algorithms. One vendor is using extension cards to connect the system to PCIe, DDR memory and USB to observe their hardware design and soſt ware stack interacting with high-speed data fl ows as servers read and write the storage device.
Essential functionality High speed execution of a SoC model on an FPGA-based prototyping system is essential before silicon is available – both to permit development and verifi cation of the full soſt ware stack and to understand hardware/soſt ware interactions. For SoC designs that include many
high-speed I/Os, it is equally essential that the prototype be exercised with large amounts of real-world I/O over extended periods – not with short bursts of synthetic data. In the past, this has been a problem for
design teams, diverting critical resources away from SoC design and into fi xturing. T e problem is solved uniquely, with a family of extension boards that integrate at- or near-speed I/O directly onto FPGA boards and onto the FPGA’s I/O pins. T e result is improved hardware and
soſt ware integrity before tape-out. And that leads to earlier delivery of more robust and reliable end products.
Figure 3: AMD VP1902 FPGA module with user accessible connectors for interconnect and protocol support (Source: Siemens EDA)
www.electronicsworld.co.uk December 2025/January 2026 37
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