EMC & Circuit Protection
Solving IEC system protection for analog inputs
Systems that operate in harsh electromagnetic environments are required to withstand high voltage transients on the input or output nodes—and when moving from device-level standards to system-level standards for high voltage transient robustness, there is a substantial difference in the energy levels transmitted to the pin of an IC. Therefore, ICs that directly interface with these system input/output nodes must also be sufficiently protected to withstand the system-level high voltage transients. Failure to account for this protection early in a system design can lead to inadequate system protection, delayed product release, and reduced system performance. In this article, David Forde describes how to protect sensitive analog input and output nodes from these IEC standard transient levels
I IEC 61000
EC 61000 is the standard that covers EMC robustness at the system level. The three sections of the standard that deal with high voltage transients are IEC 61000- 4-2, IEC 61000-4-4, and IEC 61000-4-5. These are the system-level standards for electrostatic discharge (ESD), electrical fast transients (EFT), and surge. These standards define the waveforms, test methods, and test levels for evaluating the immunity of electrical and electronic equipment when subjected to these transients.
The primary purpose of the IEC 61000- 4-2 test is to determine the immunity of systems to external ESD events outside the system during its operation—for example, if a system input/output comes in contact with a charged human, cable, or tool. IEC 61000-4-2 specifies testing using two coupling methods: contact discharge and air gap discharge.
IEC 61000-4-4 EFT testing involves coupling a number of extremely fast transient impulses onto the signal lines to represent transient disturbances associated with external switching circuits that are capacitively coupled onto the signal lines. This testing reflects switch contact bounce
or transients originating from the switching of inductive or capacitive loads, all of which are common in industrial environments.
Surge transients are caused by overvoltages from switching or lightning transients. Switching transients can result from power system switching, load changes in power distribution systems, or various system faults, such as short circuits and arcing faults to the grounding system of the installation. Lightning transients can be a result of high currents and voltages injected into the circuit from nearby lightning strikes.
Transient voltage suppressor Basic parameters of a TVS: A transient voltage suppressor (TVS) can be used to suppress voltage surges. They are used to clamp high voltage transients and shunt large currents away from sensitive circuitry. The basic parameters for a TVS are: • Working peak reverse voltage: The voltage below which no significant conduction occurs • Breakdown voltage: The voltage at which some specified conduction occurs
Figure 2: OVP switch functional block diagram
• Maximum clamping voltage: The maximum voltage across the device when conducting the maximum current specified There are a number of factors that must be considered when using a TVS device on a system input or output. An ESD or EFT event will generate a very fast time (1 ns to 5 ns) transient waveform, resulting in an initial overshoot voltage on the system input before the TVS device clamps at its breakdown voltage. A surge event has a different transient waveform with a slow rise time (1.2 µs) and long duration (50 µs) pulse, and in this event the voltage will be initially clamped at the breakdown voltage, but it can continue to increase to the TVS maximum clamping voltage. In addition, the TVS must be higher than any tolerated DC overvoltage that could be caused by miswiring, loss of power, or user errors to protect the system against this DC overvoltage event. All three situations can cause a potentially damaging overvoltage on the input to the downstream circuitry.
Analog input protection circuit In order to fully protect a system input/output node, the system must be protected against DC overvoltages and high voltage transients. Using a precision,
robust overvoltage protection (OVP) switch at the system input combined with the TVS can protect sensitive downstream circuitry (for example, analog-to-digital converters or amplifier inputs/outputs), as it can be used to block overvoltages and suppress residual currents that are not shunted to ground by the TVS. Figure 2 shows the functional block diagram of a typical overvoltage protection switch; note that this switch does not have ESD protection diodes referenced to its supplies on its input node. It instead has an ESD protection cell that triggers above the devices maximum standoff voltage, which enables the device to stand off and block voltages beyond its supplies. As an analog system typically requires that only the outside facing pins of the switch need IEC protection, the ESD protection diodes are retained on the internal-facing pins (noted as switch output or drain side). These diodes benefit by serving as a secondary protection device. During a short duration, a high voltage transient with a fast rise time-like ESD or EFT, the transient voltage is clamped so the voltage will not reach downstream circuits. During a long duration, a high voltage transient with a slow rise time-like surge, the output voltage
Figure 1: IEC system protection for precision analog inputs 40 September 2018 Components in Electronics
Figure 3: System operation regions
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