MPUs and MCUs
Figure 3: Simplified system design
when the CPU is asleep. This can provide a much faster response, avoiding the need for interrupts.
This can be used with the ADC in a level sensing system to detect when the level exceeds a programmed threshold. The CPU can be dedicated to other high priority tasks and only alerted by an interrupt when a particular condition is reached. The CPU can even be placed into sleep to reduce power consumption, and only awakened on a valid alarm condition.
The Data Transfer Controller (DTC) is a peripheral that has been designed to provide a simple, but extremely flexible, mechanism to transfer data between a peripheral and memory or memory and a peripheral. The DTC uses a simple programmable controller to make data transfers between memory and peripherals, keeping its configuration information in a table in SRAM. This programmability provides a much higher level of flexibility compared to using a DMAC, and we can have almost unlimited channels, only restricted by the available amount of SRAM.
An event (or interrupt), triggered by the CPU, a peripheral or an external pin, can generate several actions on the device. Figure 2 shows a simplified diagram of the interrupt controller. It illustrates how an event can trigger several actions. These include a traditional interrupt, a DMAC transfer, or a DTC transfer. It is also possible to trigger more than one of these from a single event.
The DTC controller can be used to create multiple transfer channels, only limited by the amount of SRAM available. The main disadvantage of this mechanism is that for each transfer a few cycles must be taken to read the configuration data held in the
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SRAM. As a result, the DTC transfer is generally slower than a DMA transfer. The DTC can transfer multiple bytes between a peripheral and memory or memory and peripheral up to 256 times. The source and destination address can be the same, or can be incremented or decremented independently, thus creating a buffer structure in memory. The DTC generates an interrupt when the data is ready or can trigger a second DTC transfer. This is used to chain several transfers together; this chain mode can be used to transfer multiple pieces of data between peripherals and memory.
Chain mode can be used with the DOC, as multiple transfers from various locations in memory and/or peripheral can be triggered by one interrupt source. With one interrupt we can cause comparison data to be loaded into the DOC, and by chaining a second transfer, we can load the DOC with the data from the ADC to be compared. This ability for one interrupt to generate a complex sequence of different transfers is extremely powerful.
The DTC can also be placed into repeat mode, where it will repeat the transfer a number of times. This flexibility provides a perfect compromise between speed and flexibility. Users can create automated transfers between any peripheral and memory, almost without limit. The DTC is much more flexible than a traditional DMAC, but for higher data transfer speeds the DMAC is faster. Almost all the RA microcontrollers include multiple DMAC channels, but the DTC wins hands down for flexibility and the ability to create multiple channels.
Let’s now look at how we can use these functions to create an intelligent analogue
sampling system. This system is a simple multiple input level detector, which uses the group scan mode of the 12-bit ADC to sample each of 4 input signals in turn. Using the DTC and the DOC, it detects whether a programmable threshold level is exceeded.
After the initial system setup, the CPU goes to sleep to save power, and only awakens if an interrupt occurs. This is shown in Figure 3.
The ADC continuously samples each input in turn and copies the result into SRAM. When all four inputs have been sampled, the ADC generates a DTC request. Using chain mode, this request starts a chain of eight transfers between memory and the DOC, copying both the four ADC results, and a corresponding threshold value that each result should be compared against.
ADC transfer request to DTC. DTC transfer 1 DTC transfer 2 DTC transfer 3 DTC transfer 4 DTC transfer 5 DTC transfer 6 DTC transfer 7 DTC transfer 8
We initialise the DOC to compare each value and generate an interrupt if any of the threshold values are exceeded. Once initialised, each input is continuously checked in the background. The CPU can manage other tasks or be placed in sleep and will not wake until one of the inputs
exceeds the threshold value.
Many low-level tasks can be automated in the same way. This can be an extremely powerful technique to save development time for low-level software drivers and improve system performance.
Every member of the RA microcontroller family includes intelligent peripheral features like the DOC and the DTC as well as many other peripheral functions, which can also be used to create intelligent subsystems. They provide highly flexible solutions for automating low level I/O functions. This automation not only improves the system response time but reduces software complexity and size, so increasing reliability and reducing test costs.
The RA microcontroller family is aimed at a wide range of communications and control applications such as motor control, smart
Comparison[0] to DOC. AN000 to DOC
Comparison[0] to DOC AN001 to DOC
Comparison[0] to DOC AN003 to DOC
Comparison[0] to DOC AN005 to DOC
Chain Enabled, next transfer. Chain Enabled, next transfer. Chain Enabled, next transfer. Chain Enabled, next transfer. Chain Enabled, next transfer. Chain Enabled, next transfer. Chain Enabled, next transfer. Chain Disabled, stop
sensors, metering, hand-held instruments, low power modems and many other industrial and consumer applications. It is available in a wide range of memory size and package options.
www.renesas.com/ra. Components in Electronics April 2023 37
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