Condition monitoring & predictive maintenance
issue a reset signal to the MCU, which means the programme is not running smoothly. Figure 1a shows an example of the watchdog implementation with a separate time base but without a time window through the MAX6814. Notably, MCUs usually have an internal watchdog timer (WDT), but it cannot be solely relied on to detect a fault if it is part of the defective microcontroller, which will be an issue considering common cause failures (CCF). To address such CCF concerns, a separate WDT is used to ensure the MCU is placed in reset.
Figure 2. Windowed watchdog operation.
Through a flowchart, Figure 1b illustrates the behaviour of the watchdog timer as embedded in the MCU’s programme execution. Before the flow starts, it is important to set the watchdog timeout period or the WDT’s maximum reset interval. When such a period or interval is defined, the WDT will run upon execution of the programme. The MCU must be able to send a signal to the MAX6814’s WDI pin before it reaches timeout, as the device will issue a reset signal to the MCU if the timeout period is reached. When the MCU resets, the system shall be placed into a safe state. Such a WDT’s timeout period will capture programme sequence issues; for example, a programme sequence gets stuck in a loop, or an interrupt service routine does not return in time. For instance, only five of the ten subroutines meant to be run on every loop of the software are executed. However, it will not cover other programme sequence issues – whether execution of the programme took longer or shorter than expected, or whether the programme sections were executed in the correct sequence. This can be addressed by the next type of WDT.
WATCHDOG WITH A SEPARATE TIME BASE AND A TIME WINDOW
As the existence of a separate time window allows the detection of both excessive delays and premature execution, windowed WDTs prohibit the MCU from responding outside the WDT’s open, also referred to as valid, window specification. Compared with simple watchdogs, this checks that programme execution meets the specified timing requirements; otherwise, it will assert the MCU into reset.
Figure 3. Another implementation: windowed watchdog through I2 C. Figure 4. PEC byte coverage to I2 Instrumentation Monthly October 2026 C interface failures.
Figure 2 shows an example implementation of programme sequence monitoring using the MAX6753. It comes with a windowed watchdog with external-capacitor-configurable watchdog periods. Figure 3, on the other hand, shows another implementation using the MAX42500, whose watchdog time settings can be configured through I²C – effectively reducing the number of external components and providing the capability to increase fault coverage through a packet error checking (PEC) byte, as shown in Figure 4. The PEC byte increases diagnostic coverage against I²C communication-related failures such as bus errors, stuck-bus conditions, timing problems and improper configuration.
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