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Test & measurement


Speeding up power rail timing verification


In this article, Lee Morgan, market development Manager at Tektronix, looks at why using a four-channel oscilloscope to verify power rail timing can be challenging. He also shows a few examples using an


eight-channel scope, which have becoming increasingly more common across the industry


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microcontroller can require several power rails, and these may have specific timing requirements. For example, a chip manufacturer may recommend that the core voltage supply stabilise before the I/O supply voltage is applied. Or a manufacturer may require that supplies come up within a specified time relative to each other to avoid prolonged voltage differences on various supply pins. The power-on sequence between processors and external memory can also be critical. Chip manufacturers may specify that par ticular


M


supplies must come up monotonically to avoid multiple power-on resets. This can be challenging since inrush currents can place high transient demands on point of load regulators. In this case the shape of power rail star tup is as impor tant as the timing sequence. Once you combine the various chip supply requirements, bulk supplies, reference supplies and


April 2019 Instrumentation Monthly


ost electronics systems today use more than one power rail and many use four or more. A single IC, such as an FPGA, DSP or


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