Calibration Figure 14. Total error of the AD7606B with the on-chip gain calibration enabled.
On-Chip Calibration vs. Back-End Calibration (Bench Results) As described in the theoretical study, a simple calibration coefficient could be implemented on the controller side (MCU, FPGA, DSP). However, that presents two major drawbacks: the extra controller resources needed, and the error introduced by the input impedance part-to-part variation. In order to demonstrate the benefits of the on-chip calibration compared to a back-end calibration, a series of AD7606C-18 units were measured - units under test (UUT) numbered 1 to 4 in Figure 17 - assuming always the input impedance is the typical value (RIN = 1.2MΩ).
UUT #1, shown in Figure 17a, does the calibration quite well, comparable to the on-chip calibration. That means its actual
input impedance (RIN) is very close to the typical value.
Figure 15. (a) System gain error as a function of RFILTER for the AD7606C-16 with and without enabling the on-chip gain calibration and (b) close-up of the on-chip calibration plot.
typically 1.2MΩ. These generics in the family, thanks to the lower input impedance, enable lower noise and greater SNR performance. On the other hand, they have a similar system gain error when a resistor is placed in front of the analogue inputs. By enabling the on-chip gain calibration, the error can again be greatly reduced, down to less than 0.03%. In summary, both the gain error caused by an external
front-end resistor (RFILTER) and the accuracy of the on-chip calibration feature will rely on the input impedance (RIN), which is known in every device internally. For all three
Figure 16. Actual AD7606C-16 results compared to theoretical analysis.
unadjusted error (TUE), and it includes all potential sources of error because:
The reference and reference buffer are assumed ideal. Any deviations from the 2.5V reference or 4.4V reference buffer output are not removed.
The resistor is assumed ideal at the value written despite its 1% tolerance. Any deviation from the expected resistance value is not removed.
The offset error is not removed from the measurement - neither the AD7606x offset error nor the mismatch between the front-end resistors.
The input impedance on the AD7606C-16 and AD7606C-18, unlike the AD7606B and AD7606, is
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generics, the gain error scales linearly with RFILTER if no calibration is performed, but Table 2 shows a comparison
for just three given RFILTER values and how it remains flat independent of such resistor value.
This actual data can then be compared to the theoretical data obtained in the AD7606B/ AD7606C generation section. As an example, Figure 16 shows in the same graph the total error gathered
on an AD7606C-16 as a function of RFILTER, with on-chip calibration enabled, and the worst-case error calculated in the theoretical analysis from Figure 13. Despite that the error figures gathered on the bench are indeed the TUE - given no offset or linearity errors are removed - they’re still lower than the theoretical numbers. This indicates firstly that the gain error is the main contributor to the device’s TUE, and secondly that the actual resistors used in front of the resistive input ADC are well within the 1% specified tolerance. In any case, the total DC error is confirmed to be kept less than ±0.1% FS, which is the target in many applications, with no need for calibration, only writing to the ADC the value of the resistor placed in front, independently of its value as long as it is less than 65kΩ ±1%.
UUT #2 to #4 show a certain deviation, which means the actual input impedance (RIN) is slightly higher than the typical value.
On-chip calibration, displayed in dark blue in all four plots, keeps the total error lower
than 0.03% across all units and RFILTER values.
Using a calibration coefficient in the back-end controller does not take into account the actual input impedance of the PGA, which implies post- calibration errors due to part-to-part variation. However, on-chip calibration internally measures this input impedance, therefore achieving greater
calibration results, independent of both the RFILTER placed in front and the actual RIN impedance. This lower post-calibration error - added to the benefit
of removing the need for post-processing every single ADC data point in the controller, which consumes resources - leads to a more efficient, easy to use, and accurate system design.
CONCLUSION
Resistive input simultaneous sampling ADCs are a complete solution, with all signal chain blocks on-chip, offering excellent AC and DC performance and ease of use, allowing for direct sensor interface. As noted in some applications, there is a need for external resistors in front of the analogue input. These external resistors add errors to the system accuracy, which leads to longer time to market and extra calibration costs. ADI answers this problem with the AD7606B family of new resistive input ADCs. This solution includes both larger input impedance and on-chip calibration features, reducing the error introduced by external resistors to a minimum.
Analog Devices
www.analog.com June 2026 Instrumentation Monthly
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