generic manufacturing
data. After this final mask assembly, the reticles or masks can be created.
Multi Project Wafer runs By sharing the costs for the fabrication, the reticles or masks and the set-up and use of the design environment in Multi Project Wafer (MPW) runs, the access barrier to photonic integration technology can be brought down.
The amount of offered MPW runs has increased considerably over the last period of time and these results in a steep increase in the amount of research and development activities in the field of integrated photonics. Moreover, the increase of the number of fabricated wafers with a same process flow creates more stable manufacturing processes to further drive down the costs by an increased yield.
The design flow as described in this paper has been applied successfully within a number of MPW runs [5, 6, 7]. During the past six months, runs in Indium Phosphide [9, 10, 11], TriPleX [7] and silicon photonics [12, 13] have been executed on the developed design platform and more than 50 different designs have been successfully implemented for six different foundries and two packaging providers [14, 15].
Future outlook
A set of re-usable building blocks that is available in stable and mature (commercial) foundry processes leads to huge cost reductions. This opens up the application of photonics integration technologies to a much larger public. Instead of optimizing the fabrication technology for every specific application, the product design will be adapted to the capabilities of available, mature, high performance fabrication processes. The presented PDA environment plays a central role (see Figure 1) in the whole product and value chain from concept application to material, through design to manufacturing.
Further, this developed framework can be used by both companies and institutes to promote internal collaboration and information exchange between designers and with process engineers. The developed PDA framework is open to other parties creating their own plug-ins and building blocks. For example, two different Arrayed Waveguide Grating plug-ins, for designing wavelength filters, have been created by third parties [11, 16] and are actively used in the mentioned MPW runs designs.
© 2012 Angel Business Communications. Permission required.
References [1] Aspic: photonic circuit design and simulation tool [2] FieldDesigner: advanced modesolver,including T/O,E/O,3D Ring Resonator and Active Material modules
[3] OptoDesigner: propagation simulator,includes BPM,FDTD, BEP/EME,Zone and FAST technology
[4] MaskEngineer: object oriented and parametric layout solution [5] InP MPW brokering organisation: JePPIX -
http://www.jeppix.eu [6] SOI MPW brokering organisation: ePIXfab -
http://www.epixfab.eu [7] TriPleX foundry partner: LioniX (Netherlands) -
http://www.lionixbv
.com
[8] European project EuroPIC -
http://europic.jeppix.eu [9] InP foundry partner: Oclaro (UK) -
http://www.oclaro.com [10] InP foundry partner: FhG-HHI (Germany) -
www.hhi.fraunhofer.de [11] InP foundry partner: Technical University Eindhoven (Netherlands) - http://w3/
ele.tue.nl/oed
[12] Silicon photonics foundry partner: CEA-Leti (France) -
www.leti.fr [13] Silicon photonics foundry partner: IMEC (Belgium) -
www.imec.be [14] Packaging partner: CIP (UK) -
http://www.ciphotonics.com [15] Packaging partner: Linkra (Italy) -
http://www.linkra.it [16] Design house: Bright Photonics (Netherlands) -
www.brightphotonics.eu
Issue IV 2012
www.siliconsemiconductor.net 37
Figure 4: From Design Kit to manufactured die [8]
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