CONNECTING THE SILICON SEMICONDUCTOR COMMUNITY Volume 34 Issue 4


News Editor Dr.Su Westwater


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Director of Semiconductor Publishing Jackie Cannon


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Tel: 724 539-2404 Janice Jenkins


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Subscriptions Manager Debbie Higham


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Directors


Bill Dunlop Uprichard – CEO Stephen Whitehurst – COO Jan Smoothy – CFO Jackie Cannon, Scott Adams, Sharon Cowley, Sukhi Bhadal


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Silicon Semiconductor is published four times a year on a controlled circulation basis. Non-qualifying individuals can subscribe at: £105.00/€158 pa (UK & Europe), £138.00 pa (air mail), $198 pa (USA).Cover price £4.50. All information herein is believed to be correct at time of going to press. The publisher does not accept responsibility for any errors and omissions. The views expressed in this publication are not necessarily those of the publisher. Every effort has been made to obtain copyright permission for the material contained in this publication.


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THE TRANSITION to manufacturing semiconductors on larger wafers continues to be one of the hottest topics under discussion in the industry. Some chipmakers have committed to advancing the transition. Intel announced that its D1X fab in Oregon and Fab 42 in Arizona will be 450mm compatible. TSMC recently updated their outlook and plans to have 450mm pilot lines by 2016- 2017, with volume production in 2018. IMEC has well-established programs focused on the challenges posed by manufacturing with 450mm wafers and the University of Albany’s College of Nanoscale Science and Engineering (CNSE) is expanding facilities to encompass 450mm tool development and other related R&D programs. The Global 450 Consortium (G450C), which was announced one year ago, provides a collaborative framework for GLOBALFOUNDRIES, IBM, Intel, Samsung and TSMC to jointly manage 450mm technology development within the CNSE infrastructure.


The 450mm wafer transition represents a significant industry inflection. While the top 3 chip makers have deep pockets and will heavily invest into the new format, the equipment industry needs to reinvent their business models to finance the enormous development costs associated with the new wafer size.


ASML, the largest equipment maker and provider of critical lithography technology, has allowed chip makers to get a stake in their company in order to co-finance the 450mm development. This is understandable as ASML also has to undertake the enormous financial burden of developing new EUV lithography tools. It would not be surprising to see similar new “deals” to mitigate the financial risk for the supply-chain.


The question remains what will be the impact on the other semiconductor device segments in the “More than Moore” arena? How much “More Moore” is needed to remain competitive there? Clearly, 450mm is not currently a priority for a variety of customer specific applications such as in automotive, analog mixed signal, power devices, MEMS, etc. Nevertheless, some higher volume products might also be attracted by the 450mm community sooner or later. Therefore, most within semiconductor ecosystem are necessarily paying attention to – and planning for, the eventual wafer size transition as it will have widespread implications for those that make the transition as well as those that wait. For its part, SEMI is facilitating the development of industry standards and the flow of information throughout the supply chain with the launch of 450 Central (www.semi.org/450), a web-based information service to help the semiconductor industry efficiently transition to 450mm-ready solutions and keep the industry informed of important news and perspectives on 450mm wafer processing.


By Heinz Kundert, President SEMI Europe


mitch.gaynor@angelbc.com sharon.cowley@angelbc.com shehzad.munshi@angelbc.com robin.halder@angelbc.com jackie.cannon@angelbc.com


editorialview


E: tbrun@brunmedia.com E: jjenkins@brunmedia.com


450mm Wafer Transition: a challenging disruptive technology format that opens up new opportunities and risks in semiconductors


Issue IV 2012 www.siliconsemiconductor.net 3


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