technology III-V MOSFETs
III-Vs and the silicon roadmap
Silicon foundries could switch production from silicon MOSFETs to those based on III-Vs and germanium by the end of this decade. Making this transition is far from trivial, but progress is being made in gate dielectrics, contact resistance, peak current flow and material quality. Richard Stevenson reports.
T
ime and time again, critics have claimed that there will soon come an end to the shrinking of silicon transistors to smaller dimensions. Some have argued that photo-lithography cannot extend beyond optical wavelengths – but tools have been built that can do just that; others have warned that electrons cannot zip about fast enough when transistors reach the nanoscale – but adding a little strain into the material has put that issue to bed; while others have pointed out that high leakage currents will put an end to device scaling – but this issue has not been a show-stopper, thanks to a switch from silicon dioxide to high-k dielectrics, such as hafnium dioxide.
Today, claims that the days of the silicon transistor are numbered are still being made – and there’s a good chance that this time the critics could well be right. That’s because this belief is not just held by those outside the silicon industry, but also some within it:
Alternatives to silicon are now on the International Technology Roadmap for Semiconductors (ITRS), with III-Vs and germanium predicted to make an impact at the 11 nm node that could be rolled out in 2015.
Iain Thayne from the University of Glasgow, UK, explained the reason for the potential invasion of these new materials into silicon lines at the recent CS Europe conference in Frankfurt, Germany. Thayne, whose efforts at developing III-V transistors initially focused on RF and millimetre-wave front-end applications, argued that compound semiconductors must be introduced to maintain performance as dimensions are reduced.
“Increasing the density of transistors in silicon leads to heating, which will soon approach an air-conditioning limit,” said Thayne. He explained that preventing over-heating in the circuits that will be built with tomorrow’s transistors requires a reduction in the voltage of the power supply, but no compromise in performance. The only way to satisfy these conditions is to replace silicon transistors with those based on III-Vs and germanium.
He also pointed out that scaling efforts are focused on increasing the density of transistors. Although every new node has a shorter gate length, it also has a reduction in gate pitch, which is scaled even more aggressively (see Figure 1).
Figure
1.According to the ITRS roadmap,between 2011 and 2024 reductions in gate pitch will be more rapid than those in gate length
Sceptics within the silicon industry have argued that III-Vs will never be suitable for logic circuits, because the drive currents produced by this class of transistor are not high enough, due to the low densities of states associated with compound semiconductors. But Thayne’s colleague Asen Asenov has spotted fundamental flaws in this argument: Although the low density of states in III-Vs leads to a lower effective capacitance, these materials combine a high mobility with a low mass, resulting in the injection of carriers with high velocities and increased ‘ballisticity’. What’s more, the lower density of states means that
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www.siliconsemiconductor.net Issue 2 2012
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