cover story epigan
heterostructures on silicon substrates up to 150mm in diameter. In the near future this growth process will be extended to 200mm silicon. There is also an opportunity to develop process compatibility with standard CMOS technology. This would open the door to further cost reduction by enabling these wafers to be put through lines at 200mm silicon labs operating around the globe.
No wonder that GaN power electronics technology is lately attracting increasing interest. But no one is yet to deliver the real commercial breakthrough - a reliable device operating at 600V. One of the challenges is to establish a compound semiconductor technology in a field where silicon dominates, and many potential users have been scarred by the experience of SiC. Although the performance of SiC diodes is attractive for power converter manufacturers, they are too pricey. In addition, until recently these diodes could not be paired with SiC transistors - which is detrimental to the uptake of this first-on-the-market wide band gap solution.
Another reason behind the lack of a commercially attractive and reliable 600V and above device is that it is tough to manufacture GaN-on-silicon epitaxial structures, which are the starting point for making power electronics.
This is the challenge that EpiGaN has set out to master. The company was formed as a spin-off from the large international nano-electronics research centre located in Leuven, Belgium. EpiGaN is built on its founders’ expertise developed at Imec, where they were involved in GaN research since 2001. Some of their key successes include the world’s first low-sheet-resistivity, 150 mm HEMT structures in 2006, and the first GaN-on-silicon 200 mm epi-
wafers, a feat achieved in partnership with the MOCVD toolmaker Aixtron.
EpiGaN’s approach differs from that of several other players, which employ SiC as the substrate for their nitride devices. EpiGaN focuses on GaN-on-silicon, due to its cost advantage. Initially, the company developed material for RF devices (such as epi- wafers for RF applications). However, given the strengths of GaN-on-silicon for power electronics, it was obvious to switch target the potentially lucrative power semiconductor market.
The commercial prospects of GaN on silicon have attracted a strong investor group, among them Robert Bosch Venture Capital, Capricorn Cleantech fund and LRM. These investments have been used to set-up the plant for producing GaN epi-wafers by MOCVD, which was started up in May 2012.
Taking out the Strain
EpiGaN’s epitaxial growth process tackles the grid strain that arises when GaN is deposited on silicon. The two materials show different crystalline properties and thermal expansion coefficients. Left unchecked, this can lead to unchecked strain in the epi-layer and substrate that can ultimately cause the wafer to bow and even crack.
Carefully managing this strain yields wafers suitable for passing through regular silicon processing lines. EpiGaN now manufactures 150mm epi-wafers with a bow well below 50µm - typically 20 to 30µm, depending on wafer specs. Uniformity, in terms of standard deviation of either layer thickness or electrical characteristic, is typically better than 3 percent.
Stress engineering certainly is a challenging aspect of forming GaN-on-Si. An even more challenging issue is passivation of surface states. As a piezoelectric material GaN has an excellent high- electron concentration associated with high electron mobility - obtained without extra doping.
But there is a significant price to pay: an extreme sensitivity governing device characteristics, such as current density and threshold voltage on the filling of those surface states, which have a density comparable to that found in the channel. If passivation is poor, the device’s dynamic behaviour suffers. To combat this so-called dispersion problem, devices must be processed in a carefully controlled manner using high-quality epi-wafers, because this leads to optimized buffers and controlled surface states.
Fig 2:SiN/AlN/GaN heterostructure
12
www.siliconsemiconductor.net Issue 2 2012 Uncontrolled charging or discharging of these
Page 1 |
Page 2 |
Page 3 |
Page 4 |
Page 5 |
Page 6 |
Page 7 |
Page 8 |
Page 9 |
Page 10 |
Page 11 |
Page 12 |
Page 13 |
Page 14 |
Page 15 |
Page 16 |
Page 17 |
Page 18 |
Page 19 |
Page 20 |
Page 21 |
Page 22 |
Page 23 |
Page 24 |
Page 25 |
Page 26 |
Page 27 |
Page 28 |
Page 29 |
Page 30 |
Page 31 |
Page 32 |
Page 33 |
Page 34 |
Page 35 |
Page 36 |
Page 37 |
Page 38 |
Page 39 |
Page 40