News Review
Micron and Intel claim NAND leadership
INTEL CORPORATION and Micron Technology announced a new benchmark in NAND flash technology — the world’s first 20 nanometer (nm), 128 gigabit (Gb), multilevel-cell (MLC) device. The companies also announced mass production of their 64Gb 20nm NAND, which further extends the companies’ leadership in NAND process technology.
Developed through Intel and 8
Micron’s joint-development venture, IM Flash Technologies (IMFT), the new 20nm monolithic 128Gb device is the first in the industry to enable a terabit (Tb) of data storage in a fingertip-size package by using just eight die. It also provides twice the storage capacity and performance of the companies’ existing 20nm 64Gb NAND device. The 128Gb device meets the high-speed ONFI 3.0 specification to achieve speeds of 333 megatransfers per second (MT/s), providing customers with a more cost- effective solid-state storage solution for today’s slim, sleek product designs, including tablets, smartphones and high-capacity solid-state drives (SSDs.) “As portable devices get smaller
and sleeker, and server demands increase, our customers look to Micron for innovative new storage technologies and system solutions that meet these challenges,” said Glen Hawk, vice president of Micron’s NAND Solutions Group. “Our collaboration with Intel continues to deliver leading NAND technologies and expertise that are critical to building those systems.” The companies also revealed that the key to their success with 20nm process technology is due to an innovative new cell structure that enables more aggressive cell scaling than conventional architectures. Their 20nm NAND uses a planar cell structure — the first in the industry — to overcome the inherent difficulties that accompany advanced process technology, enabling performance and reliability on par with the previous generation. The planar cell structure successfully breaks the scaling constraints of the standard NAND
floating gate cell by integrating the first Hi-K/metal gate stack on NAND production.
“It is gratifying to see the continued NAND leadership from the Intel-Micron joint development with yet more firsts as our manufacturing teams deliver these high-density, low-cost, compute-quality 20nm NAND devices,” said Rob Crooke, Intel vice president and general manager of Intel’s Non- Volatile Memory Solutions Group. “Through the utilization of planar cell structure and Hi-K/Metal gate stack,
IMFT continues to advance the technological capabilities of our NAND flash memory solutions to enable exciting new products, services and form factors.”
The demand for high-capacity NAND flash devices is driven by three interconnected market trends: data storage growth, the shift to the cloud and the proliferation of portable devices.
As digital content continues to
grow, users expect that data to be available across a multitude of devices, all synchronized via the cloud. To effectively stream data, servers require high-performance, high-capacity storage that NAND delivers, and storage in mobile devices has consistently grown with increased access to data.
Fraunhofer CNT signs JV with ASM
FRAUNHOFER CNT announced the signing of a Joint Development Agreement with ASM International N.V. (ASM). The agreement provides a framework within which a variety of new projects will be executed over the course of the coming five years. Under the terms of the agreement, Fraunhofer CNT and ASM will develop new processes and integration methods, starting on ASM’s Advance series A412 300 mm vertical batch furnace configured for atomic layer deposition (ALD) and low pressure chemical vapor deposition (LPCVD). Fraunhofer CNT will provide space and infrastructure for the A412 system in its clean room. In the first project, the objective is to develop and integrate novel batch ALD processes and materials for use in CMOS logic technology. In addition to 40 clean room tools, scientists at Fraunhofer CNT offer considerable expertise in process and materials characterization as well as the characterization of nano-electronic devices. Pre-processed test or product wafers provided by ASM or its customers will be processed at Fraunhofer CNT under strict cross contamination requirements as developed through several years in cooperation with leading edge IC manufacturers. Thus, the results can be transferred immediately into
production. This enables our partners to reduce their capital expenditures and accelerate their developments. Prof. Peter Kücher, head of the Fraunhofer CNT stated, “We are looking forward to a successful long term cooperation in developing innovative, cost competitive processes for CVD and ALD together with a leading global equipment supplier such as ASM”.
Ivo Raaijmakers, Chief Technology
Officer of ASM added, “We have successfully collaborated with CNT for over 5 years, and are confident that this new cooperative R&D framework will enable other successful projects”.
www.euroasiasemiconductor.com Issue V 2011
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