PHOTONIC INTEGRATED CIRCUITS FEATURE


“From a thermal perspective, we look at the increasing integration of optical and electronic components as the biggest challenge”


not practical within some data centre optical communications applications that Nokia serves. ‘Due to standards-defined ambient temperatures and an adverse thermal environment within racks, we need to provision for the refrigeration of active optical components,’ he said. ‘Improvements in active optical device materials design to increase operational temperature is one way to improve the situation.’ Nokia can also look at removing parasitic thermal resistances between devices and thermoelectric temperature controlled refrigerators, and between refrigerators and the ambient environment. Enright’s team is participating in the


heat itself is not as much of an issue as the electrical power consumption to supply the heaters,’ he echoed. ‘There are various design strategies there to try to achieve maximum tuning or trimming range, while minimising power consumption. It’s an interesting topic of R&D.’ In addition to lowering PIC costs by


exploiting silicon, it’s easier to test devices on silicon wafers, and tests can be less intensive, thanks to the reliability silicon techniques bring. With photonic devices therefore becoming cheaper, the cost of packaging that manages heat flow becomes more significant. However, silicon photonics reduces


the pressure there, because it generates less heat than silicon microelectronics chips would, stressed Barwicz. He added that, currently, such photonic devices are typically positioned at circuit board edges, meaning that ‘the thermal aspects are not a significant issue’ for them. Barwicz echoed Wilmart’s observation


that significant problems arise with active photonic chips. ‘The light source is temperature sensitive – the efficiency


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of typical III-V active regions drops significantly when the temperature exceeds 70˚C,’ Barwicz said. Thermal management may be more critical in vertical cavity surface emitting laser (VCSEL) miniaturisation for high-speed modulation, where heat extraction is a key limitation, than in silicon photonics, he added. Ryan Enright, senior member of technical


staff at the Thermal Management Research Group at Nokia Bell Labs in Dublin, Ireland, also emphasised the different capabilities of PIC elements. ‘From a thermal perspective, we look at the increasing integration of optical and electronic components as the biggest challenge,’ he said. ‘These components have distinctly different operational temperature requirements dictated by performance and reliability considerations. Typically, active optical devices, like lasers and semiconductor optical amplifiers (SOAs) need to be maintained below 60°C, but silicon-based electronics are quite happy operating at 80-90°C.’ Ideally, cooling PICs shouldn’t consume any energy, Enright observed, but that’s


European Thermally Integrated Smart Photonics Systems (TIPS) project, which targets heat management issues in data centres. ‘In TIPS, we have been exploring the incorporation of single phase liquid cooling and device-level thermoelectric temperature control into silicon photonics PICs,’ Enright explained. ‘Specifically, we have been assessing the trade-offs between thermal performance and manufacturability, given the constraints of the overall silicon photonics fabrication process.’ The project concluded in January and Nokia has started building on its lessons other internal research efforts, Enright said. Thermoelectric cooling also offers


interesting prospects in thermal tuning, which usually uses resistive heating. ‘We have been exploring the concept of device-


g


A scanning electron microscope image of the hybrid SiN-silicon grating fibre coupler from LETI that helps demonstrate the potential to produce a CWDM transceiver based on SiN


March 2018 Electro Optics 27


Vitya_M/Ask/Shutterstock.com


LETI


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