FEATURE PHOTONIC INTEGRATED CIRCUITS
Taking the heat off PICs
Shrinking optoelectronic components and combining them with silicon devices requires careful consideration of thermal management, finds Andy Extance
E
fforts to make optical devices smaller, more integrated, and better able to exploit silicon manufacturing technology bring
many advantages, but also create new challenges in managing the heat they experience. Designers must therefore think hard about removing this heat, in particular within photonic integrated circuits (PICs). One key integration driver has been silicon photonics, bringing higher yield and lower chip cost by effectively pre- assembling photonic circuits using lithography. Quentin Wilmart is a researcher from Leti in Grenoble, France, working on this opportunity in the European project CmOs Solutions for Mid-board Integrated transceivers with breakthrough Connectivity at ultra-low Cost (COSMICC). It aims to develop economical integrated optical transceivers based on silicon photonics for data centres. ‘Our approach is to reduce the power consumption coming from the temperature management,’ said Wilmart. High temperatures can affect III-V compound semiconductors such as GaAs or InP, making lasers emit light at a longer wavelength than intended. This ‘red detuning’ can be caused by heat emitted by devices during operation, and varies with
26 Electro Optics March 2018
temperatures in data centres. ‘Achieving thermally stable lasers is, of course, a major challenge,’ Wilmart observed, usually requiring energy-hungry thermo-electric coolers (TECs).
Ensuring photonic circuits are relatively insensitive to this wavelength shift can therefore eliminate TECs, Wilmart said. ‘This is why we use the coarse wavelength- division-multiplexing (CWDM) standard, which tolerates small detuning from the central wavelength thanks to its 20nm channel spacing.’ This has important consequences for COSMICC’s photonic module designs, including using polymer waveguide ribbons from Swiss firm Vario- optics that extracts light from chips with low loss and wide bandwidth. ‘In particular,
“Achieving thermally stable lasers is… a major challenge”
the large bandwidth is key for CWDM application, as it covers four channels, extending over 80nm,’ Wilmart explained. He is helping enable the CWDM
transceiver by adding a SiN layer to Leti’s current silicon-on-insulator (SOI) photonic platform, as changing temperatures can also affect such devices’ multiplexers. One solution is to place a heater next to the multiplexer to compensate for the temperature changes, but again this consumes a lot of power. Instead, to make the CWDM device’s multiplexers more thermally insensitive, COSMICC aims to put them in the SiN layer. SiN’s optical index is around one-tenth as sensitive to temperature as silicon’s, Wilmart noted. At the Photonics West conference in San Francisco in February, COSMICC
demonstrated a SiN ring resonator coupled to a SiN waveguide. The resonator’s optical index did, in fact, show low sensitivity to temperature, which looks promising for the project’s intention to use SiN in a CWDM multiplexer. COSMICC partner STMicroelectronics is now working on SiN devices at its Crolles, France, research centre and will use the technology to enhance its photonic fabrication lines. Leti scientists have also studied optimising bit rates for optical data interconnects based on silicon photonics, which underlined the importance of thermal issues, Wilmart said. His colleagues looked at a link carrying data from the electrical to the optical domain, encoding data with a ‘thermally-tuned’ ring resonator modulator. Such modulators incorporate heaters that control their resonance wavelengths. In particular, the researchers wanted to find out whether a 65nm lithography scale CMOS or 28nm SOI platform promised the best energy-per-bit ratio. While the SOI platform was more energy efficient overall, the change in efficiency with bit-rate was more interesting. Between 12-22Gb/s the SOI device’s energy efficiency per bit remained largely constant when thermal tuning consumed 3mW. However, reducing thermal tuning’s power consumption consistently lowered the minimum energy consumption per bit, which was attained at low bit rates. The team therefore concluded that ‘further research should aim for lower tuning powers, instead of higher speed’.
Actively uncool Tymon Barwicz, who leads silicon nanophotonic packaging research at IBM in Yorktown Heights, New York, observed that thermal tuning is a popular approach. ‘The
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