Wearable Electronics
How ultra-low-power memory solutions help to improve the power-efficiency and performance of smart wearable devices
By Paul Wells, CEO at sureCore O
ver the last few years, we have seen dramatic improvements in both the performance and functionality of smart wearable devices. The next generation of
smart wearables, such as sport/health tracking smart watches, intelligent ear buds and noise cancelling hearing aids, involve complex components in very small form factors. Enabling ‘smart’ capability often requires a larger software footprint, and the latest products are also including machine learning engines. To deliver enhanced performance and functionality means a jump in additional computational power coupled with a large amount of on-chip memory. These factors are making power-efficient design critical to the success of these products. Off-the-shelf memory solutions are typically optimised for either speed or density, but are normally not power optimised and so are not a good fit for the smart wearables space. This is driving System-on-Chip (SoC) developers to adopt innovative low-power design methodologies and demand low-power memory solutions. Due to the ongoing lag in battery performance improvement, for the smart wearables sector to advance further then these areas must be addressed. This article explains the importance of reducing power consumption for smart wearables and outlines why new ultra-low-power memory solutions have such a key part to play in improving the power-efficiency and performance of these devices.
The importance of reducing power consumption for smart wearables Power usage in smart wearable devices is divided into two main types: dynamic power and static power. When the device is running a computationally intensive application then the on-chip SRAM (Static Random Access Memory) is often being read from or written to by the processor on every clock cycle. This is known as the dynamic power consumption.
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Static power, in contrast, is the power consumed when the device is in an inactive state or in low-power ‘sleep’ mode. So, the device can ‘wake-up’ quickly the critical part of the codebase must be maintained in memory – which continues to drain static (or leakage) power. Extending time between recharge cycles is a crucial factor for smart wearables and so reducing both dynamic and static power is important. Developers must focus on every element of their power budget in their quest to extend battery life. Another way to lower power consumption is to reduce the supply voltage. This helps to reduce power significantly as power is proportional to the square of the voltage. With some of the more mature FinFET nodes (16/12nm) operating voltages can be substantially reduced whilst still delivering processing speeds up to 800MHz. By integrating on chip DC-DC converters and implementing a demand aware system controller then the operating voltage can be selected appropriately to meet the computational demand. However, reducing supply voltage, especially to on-chip SRAM must be done with care, and can include custom read and write assist circuitry. Low voltage memory design mandates considerable verification effort with additional statistical analysis to ensure robust operation at process and temperature extremes.
The importance of new advances in the low power low voltage memory space
As smart wearable devices integrate AI capabilities to enrich the user experience, ever more memory will be needed to support the computing demands thereby increasing the overall power budget. AI workloads, which often involve pattern matching or neural network inference, can use significant power, with SRAM making up to 50 per cent of an AI-enabled chip’s power usage. Cutting and
Components in Electronics
optimising power consumption is essential for extending battery life making the availability of low-power and low voltage memory solutions ever more pressing.
There have been many innovations in this area – with sureCore, the ultra-low-power memory specialist, developing various novel memory solutions optimised for both low dynamic power and thermal efficiency, with dynamic power reductions of up to 50 per cent. This technology is ideal for edge-AI applications where extending battery life is fundamental for the user experience. Also, in a recent project, the sureCore team was able to help the developer of a next-generation hearing aid by delivering a custom memory solution operating from 0.5V to 0.9V. This enabled a machine learning-based noise cancellation engine to provide unmatched audio clarity and demonstrated how tailored memory solutions can help to unlock new capabilities in smart wearables. Undoubtedly, next generation smart wearable devices will integrate ever more complex functionality. These advances will
intensify the need for low-power memory solutions that can support complex workloads without impacting on battery life or form factor. Innovations like in-memory computing, where arithmetic operations are embedded within the memory array, will result in more power savings by reducing data movement between memory and processors. The integration of low- power memory will also be important for applications in healthcare, such as continuous glucose monitors, where extending battery life is vital. By reducing the dynamic power, static power and supply voltage, advanced memory solutions are helping SoC developers to meet demanding system power budgets without compromising on the battery life, form factor or performance. As device complexity and memory requirements increase, the importance of and demand for more power-efficient memory solutions will only continue to rise.
www.sure-core.com
www.cieonline.co.uk
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