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PRODUCTS EDA


NEW BETA REDUCES PROGRAM SIZE BY UP TO 12%! A


new beta version has


been released by Segger of its development software "Embedded Studio". The new version focuses on program size reduction, achieving an amazing 5 to 12% on typical applications over the previous version, and even higher gains compared to GCC tool chains. These savings are the result of the new Link-Time Optimisation (LTO),


company’s Linker and Run- time library emLib-C. LTO combines all input object files into one module and optimises the entire


combined with the c


application, opening the door for advances not available to the compiler itself.


The Segger Linker adds


compression of initialised data, de-duplication, as


features such as c


well as the flexibility of dealing with fragmented memory maps that embedded developers have to cope with. Like all Segger software, it is written from scratch without


RENESAS AND BLACKBERRY


DELIVER R-CAR BASED DEVELOPMENT ENVIRONMENT


any legacy code or legacy thinking, focusing on the requirements of embedded developers. Additionally, the size required by the included runtime library is significantly lower than that of runtime libraries used by most GCC tool chains. "With these new features,


Embedded Studio is now getting even more powerful. We are seeing that it is becoming more and more popular. In combination with the Segger Linker, Link-Time Optimisation allows flash size savings on a scale I never thought possible," says Dirk Akemann, marketing manager at SeggerMicrocontroller.” www.segger.com


Renesas Electronics Corporation and BlackBerry have announced they are expanding their partnership to offer an integrated virtualisation, functional safety and secure development environment for the Renesas R-Car system- on-chip (SoC) devices. The new development environment is an


expansion of Renesas’ software package lineup for the R-Car automotive computing platform. It allows for quick development of advanced cockpit systems and improved user experience. The development environment features


COLLABORATION DELIVERS ULTRA-LOW-POWER CONNECTIVITY FOR THE IOT


Imagination Technologies and Globalfoundries (GF) are jointly collaborating to provide ultra-low-power baseband and radio frequency (RF) solutions for Bluetooth Low Energy (BLE) and IEEE 802.15.4 technology, using Imagination’s Ensigma connectivity IP on GF’s 22nm FD-SOI (22FDX) platform. In addition, Imagination has joined GF’s FDXcelerator Partner Program. The collaboration will enable the development of connected devices for the Internet of Things (IoT) using


Imagination’s ultra-low-power Ensigma connectivity engines in GF’s 22FDX process. David McBrien, executive vice president of sales and marketing, Imagination, says: “22FDX is an appealing


option for customers designing cost-sensitive devices. The collaboration has made our Ensigma connectivity IP even more power and area efficient. The availability of silicon-proven baseband and RF enables customers to rapidly introduce single-chip wireless devices requiring only a single external antenna.” “Imagination’s IP and BLE solutions complement GF’s 22FDX FD-SOI capabilities, enabling clients to


leverage low-power, low-cost designs for IoT and connected applications,” said Mark Ireland, vice president of ecosystem partnerships at GF. “We are pleased to welcome Imagination as a partner in our FDXcelerator program to further broaden IP and design service choices and flexibility that will best match client requirements.” Ensigma IP for 22FDX provides a complete IP solution comprising analogue RF/AFE as a hard macro


complete with a fully synthesisable baseband IP for applications such as wearable computing, health care, and home control. The solution for ultra-low power Bluetooth Low Energy and IEEE 802.15.4 is currently in development with lead customers, with silicon available in early Q4 2018. www.globalfoundries.com www.imgtec.com


both the high reliability and rich graphics functions required for integrated cockpit systems. It is based on the Renesas R-Car family, and features BlackBerry's QNX Software Development Platform 7.0 and QNX Hypervisor 2.0 virtualisation software. It also provides access to software products developed by BlackBerry, allowing designers to leverage the multimedia and HMI-related software for cockpit graphics systems development. The development environment takes full advantage of the virtualisation functions available in Renesas R-Car devices. This contributes to building functionally safe digital cockpit systems by isolating functions such as cluster and navigation, thereby ensuring that a fault in one area cannot corrupt another. The QNX Hypervisor 2.0 allows disparate guest operating systems such as Android and Linux to execute independently on a single R-Car device.


www.renesas.com.com


CADENCE DIGITAL TOOLS AND ADVANCED IC PACKAGING SOLUTIONS SUPPORTS TSMC TECHNOLOGY


Digital tools and advanced IC packaging solutions from Cadence Design Systems, Inc. now offer support for the new TSMC InFO_MS (InFO with Memory on Substrate) packaging technology. This support helps with creating new, complex chips using 3D stacking techniques. Cadence has made improvements to its existing InFO flow to support the new InFO_MS packaging technology, providing a flexible suite of advanced


packaging solutions to customers designing chips of various sizes and levels of complexity with memory integrated on InFO. The Cadence signoff and packaging solutions incorporate several capabilities to advance the adoption of TSMC’s InFO_MS packaging technology. The Cadence tools in the flow include the Quantus Extraction Solution, Voltus-Sigrity Package Analysis solution, Tempus Timing Signoff Solution,


Physical Verification System (PVS), OrbitIO interconnect designer, Cadence System-in-Package (SiP) Layout enhancements and Sigrity PowerSI technology, Sigrity PowerSI 3D-EM Extraction Option, Sigrity PowerDC™ technology, Sigrity XtractIM technology and Sigrity SystemSI technology. “Cadence has continued to partner with TSMC to deliver new capabilities in support of its advanced packaging technologies that allow customers to


deliver innovative designs more efficiently,” said Tom Beckley, senior vice president and general manager, Custom IC & PCB Group at Cadence. “The new InFO_MS solution can empower our mutual customers to utilise the latest packaging techniques when creating complex designs, and we are


committed to enabling them to achieve their design objectives using our tools, flows and methodologies.” “The collaboration with Cadence on the InFO_MS design flow enriches our established InFO, WoW and CoWoS chip integration solutions, giving


customers more flexibility to incorporate multiple die integration using 3D stacking techniques,” said Suk Lee, TSMC senior director, Design Infrastructure Marketing Division. “Our ongoing collaboration with Cadence is enabling customers to use our packaging technologies effectively so they can reduce design schedules and


achieve aggressive design goals.” www.cadence.com


18 NOVEMBER 2018 | ELECTRONICS / ELECTRONICS


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