Data acquisition There are reference clock and FPGA jitter
specifications that are given in terms of phase noise. To calculate the jitter contribution to the sampling clock, the phase noise specification in the frequency domain needs to be converted to a jitter specification in the time domain.
calculaTing JiTTer from phaSe noiSe The phase noise curve is somewhat analogous to the input voltage noise spectral density of an amplifier. Like amplifier voltage noise, low 1/f corner frequencies are highly desirable in an oscillator. Oscillators are typically specified in terms of phase noise, but to relate phase noise to ADC performance, the phase noise must be converted into jitter. To make the graph in Figure 4 relevant to modern ADC applications, the oscillator frequency (sampling frequency) is chosen to be 100 MHz for discussion purposes, and a typical graph is shown in Figure 4. Notice that the phase noise curve is approximated by several individual line segments, and the endpoints of each segment are defined by data points.
Figure 3. Channel-to-channel, isolated DAQ architecture.
broadband contribution if a crystal oscillator is used. Other types of oscillators may have significant jitter contributions in the low frequency area, and a decision must be made regarding their importance to the overall system frequency resolution. The integration of each individual area yields individual power ratios. The individual power ratios are then summed and converted back into dBc. Once the integrated phase noise power is known, the rms phase jitter in radians is given by:
and dividing by 2πf0 converts the jitter in radians to jitter in seconds:
Figure 4. Calculating jitter from phase noise. The first step in calculating the equivalent rms
jitter is to obtain the integrated phase noise power over the frequency range of interest - that is, the area of the curve, A. The curve is broken into several individual areas (A1, A2, A3, and A4), each defined by two data points. The upper frequency range for the integration should be twice the sampling frequency, assuming there is no filtering between the oscillator and the ADC input. This approximates the bandwidth of the ADC sampling clock input. Selecting the lower frequency for the integration also requires some judgment. In theory, it should be as low as possible to get the true rms jitter. In practice, however, the oscillator specifications generally will not be given for offset frequencies less than 10 Hz or so - however, this will certainly give accurate enough results in the calculations. A lower frequency of integration of 100 Hz is reasonable in most cases if that specification is available. Otherwise, use either the 1 kHz or 10 kHz data point. One should also consider that the close-in phase noise affects the spectral resolution of the system, while the broadband noise affects the overall system SNR. Probably the wisest approach is to integrate each area separately and examine the magnitude of the jitter contribution of each area. The low frequency contributions may be negligible compared to the
Instrumentation Monthly March 2022 Parameter
Test Condition LVDS
LVPECL
LVCMOS fOUT = 125 MHz LVDS
RJ Random jitter, rms LVPECL
LVCMOS fOUT = 125 MHz LVDS
DJ Deterministic jitte LVPECL
LVCMOS fOUT = 125 MHz LVDS
TJ Total jitter LVPECL
LVCMOS fOUT = 125 MHz LVDS
fJITTER
Phase jitter (12 kHz to 20 MHz)
LVPECL LVCMOS fOUT = 125 MHz
QuanTifying The reference clock JiTTer The reference clock typically used in a high performance DAQ system is a crystal oscillator since it offers the best jitter performance when compared to other clock sources. The jitter specifications of crystal oscillators
are typically defined in a data sheet by the example shown in Table 1. Phase jitter is the most important specification when quantifying the jitter contribution from the reference clock. Phase jitter is usually defined as the deviation in edge location with respect to mean edge location. On the other hand, there are some crystal
oscillators that specify the phase noise performance instead of jitter. If the oscillator
Table 1. example DaTa SheeT JiTTer SpecificaTion for a crySTal oScillaTor Symbol
JPER Period jitter, rms
Minimum Typical Maximum Units - - - - - - - - - - - - - - -
xxx xxx xxx xxx xxx xxx xxx xxx xxx xxx xxx xxx xxx xxx xxx
- - - - - - - - - - - - - - -
ps ps ps ps fs
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