COVER STORY FEATURE
DACs have three ports that present layout challenges: the clock input, the analogue output and the data inputs. If the data input is routed close to the output or the clock, it will couple into those signals, causing spurs to appear in the output spectrum. Likewise, if the clock couples into the analogue output through poor layout, it will degrade the integrity of the generated signal. Maximum DAC performance will be
Another important consideration in
signal generation applications is the phase noise of the output. The phase noise that is present on the output signals limits how closely the signals can be spaced and can limit the order of modulation that is possible to produce. The more phase noise that is added in the signal generation process, the higher the bit error rate of the generated signal will be. If there are several tones closely spaced, the SNR of a tone can be degraded by the spectral leakage of its neighbours, which will reduce the bit error rate of the signal produced. This loss of signal integrity can be avoided by reducing the phase noise introduced into the generated signal. A low phase noise clock will transpose
less phase noise onto the generated signal. The LTC6946 is a frequency synthesizer that can produce signals from 370MHz up to 5.7GHz. When the LTC6946 is used to drive the LTC2000 high speed DAC, the resulting phase noise is low enough for most demanding signal generation applications. Figure 1 shows a plot of the phase noise of the LTC6946 and the LTC2000. The LTC2000 has an additive of -165dBc/rHz at a 1MHz offset when producing a 65MHz output tone. This ensures the phase noise of the clock will dominate the additive phase noise of the LTC2000 itself. To avoid other noise degrading the output signals, care should be taken to use proper layout techniques in the analogue output section.
PROPER RF LAYOUT The benefit of using high performance DACs and clock sources will erode if proper design and layout rules are not used. Without proper symmetry, bypassing and barriers, the generated analogue output waveform can be corrupted and noise and other spurs can be introduced. Figure 2 shows a typical schematic for the LTC2000. The LTC2000 has a noise spectral
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density that is better than 158dBm/rHz for signals up to 500MHz, which keeps the signal to noise ratio high for a wide range of generated frequencies. It also has a spurious free dynamic range (SFDR) better than 68dB SFDR for output frequencies up to 1GHz. The outputs from the DAC should be routed as symmetrically as possible. Any asymmetry in the output network can result in a voltage differential between the differential signals. This voltage differential will result in a common mode disturbance that will produce unwanted distortion and noise in the output spectrum. Protecting the analogue outputs from offensive signals can be achieved with symmetrically placed vias, along with good layout practices. Signal generation
Figure 2:
Suggested schematic for the LTC2000
Figure 3:
Suggested layout for the LTC2000
achieved by designing the board with proper barriers between the digital section, the clock signals, and the analogue output section. It is often appropriate to route digital signals, clock signals and the analogue outputs on separate layers of the circuit board to minimise interaction between the signals. Figure 3 shows the layout of the LTC2000, indicating how to isolate the digital signals, the clock and the analogue outputs. In the figure the digital traces are routed on an interior layer of the board and only emerge through vias in the pads of the LTC2000. The clock trace is kept very short, is surrounded by vias to isolate the signal and is not routed by the digital traces or analogue outputs. The output traces are kept as symmetrical as possible, and are surrounded by barriers which protect the analogue outputs from offensive signals. With these layout guidelines and a clean sample clock, the LTC6946 and the LTC2000 will produce exceptionally clean waveforms that are suitable for most demanding signal generation applications. Signal generation applications require high sample rates to push the images out further in frequency and reduce the complexity of the output filter. The high sample rate reduces the unavoidable SINC roll-off present in all DACs. Signal generation applications require clean, low phase noise sample clocks to allow for close spacing between adjacent tones. The LTC2000, clocked by the LTC6946, has excellent phase noise performance. With a proper layout and barriers around the critical signals of the LTC2000, the noise and spectral performance are ideal for most demanding signal generation applications. This allows signals to be generated without spurious content, requiring only minimal filtering. The LTC2000 has the sample rate and performance required to solve the issues that arise in modern signal generation applications.
Linear Technology Corporation
www.linear.com.com 01628 477066
Enter 205 ELECTRONICS | OCTOBER 2014 15
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