EDA & Development Simply
‘connect’ T
he design and verification flow for complex digital designs involves an extraordinary amount of detailed information about design composition and behaviour with many inter-related pieces of data that change frequently throughout the flow’s progression. This information is represented across a range of abstraction levels in multiple formats and languages that is ultimately stored in hundreds of files. Successful completion of the flow
requires that design and verification information be analysed in a variety of ways to gain an understanding of the design’s composition, its behaviour, and the inherent relationships between various structural and temporal elements. Acquiring the knowledge critical for design comprehension is difficult without the use of automation tools that extract, store, and process design and verification information in a way that makes ‘design
• Assertions including properties and constraints;
• Testbench code with stimulus and checkers; and
• Simulation results stored as temporal waveform data.
Design knowledge Open platform for customising Verdi
knowledge’ – data and correlations between data elements – readily available for browsing and interactive analysis. A complex SoC design involves an array of diverse, inter-related pieces of information that describe and record the structural composition of the design, intentions by the design team for its behaviour over time, and its actual behaviour under various conditions. Some sources of information include:
• Design files containing design and testbench modules at multiple levels of abstraction, including behavioral, register
36 October 2011
First, it is helpful to consider the distinction between data and knowledge. Data is defined as the “representation of facts, concepts, or instructions in a formalised manner suitable for communication, interpretation, or processing”. Knowledge is defined as “expertise and skills acquired by a person through experience or education; the theoretical or practical understanding of a subject” and as “acquaintance with facts, truths, or principles, as from study or investigation”. For example, SpringSoft defines ‘design knowledge’ as the practical understanding of a design and its behaviour. Design knowledge is crucial to the successful design, verification, and debug of any electronic system or circuit. For SoC designs especially, it requires study and investigation of a vast assortment of design and verification data. The complexity of this task is compounded by the fact that the volume and variety of data generated increases rapidly as the SoC design and verification flow progresses. Much of the data is highly correlated, which also greatly adds to the difficulty of understanding the design and its behaviour. For example, structural relationships between blocks, gates, and signals determine the design’s behaviour, while relationships between design elements and the assertions that
Components in Electronics
Complex SoC designs require an extraordinary amount of detailed information. Managing and using that information effectively, however, requires tools that leverage correlated design and verification data, as Archie Feng and Thomas Li explain
transfer level (RTL), gate level, and switch level;
• Design modules written in a variety of hardware description languages (HDLs), including Verilog, SystemVerilog, and VHDL;
constrain and check behaviour determine the accuracy of verification. Identifying the relationship between verification data and design data is, in turn, key to evaluating verification results.
Using design knowledge SoC design teams rely heavily on design knowledge to develop an understanding of the intent of the designer and the causes of design behaviour. Design engineers need to understand the design structure and intended behaviour in order to complete their portions of the SoC design and successfully integrate other components. Verification engineers must understand the design intent and critical aspects of the design structure in order to craft effective verification environments,
• Correlation of component groups by user-defined criteria
Developing design knowledge Of course, it is possible to gain design knowledge by manually opening and examining the various design and verification files. However, this approach is extremely laborious and impractical for all but the simplest designs. Indeed, by today’s measures, modern designs of even moderate complexity mandate the use of automated programs and utilities to expedite viewing, tracing and analysis of design and verification data. Rapid, accurate development of such programs requires engineers with deep, rich experience and a knowledge-based infrastructure that: automatically performs
checkers, and tests. For the engineers responsible for SoC debug, an understanding of both familiar and unfamiliar parts of the design (and their behaviour) is essential to tracking down the root causes of unexpected behaviours and implementing changes so designs behave as intended.
Design knowledge can also be used to assess whether the design complies with specifications or project requirements and to accurately transform data for input to downstream design, verification, or analysis steps during the SoC flow. The range of potential design knowledge applications is literally unlimited and commonly includes:
• Traversal of design structure, including modular hierarchy and gate-level netlist
• Traversal of design behaviour by examining signal values over simulated time
• Correlation of verification results to design structure
much of the necessary analysis of raw design and verification data; stores and preserves knowledge, not just data, including correlations between elements; accesses knowledge via application programming interfaces (APIs) at the right granularity and allows intuitive use of standard viewing tools, such as source code, waveforms, schematics, and state diagrams.
The VIA Platform SpringSoft’s Verdi software is a highly automated debug system that looks to accelerate design comprehension of complex IP components, design modules and entire SoC designs. It is built on a unified design knowledge platform (DKP) of specialised databases and analysis engines. These compile, extract and preserve the design, simulation and analysis data needed to reveal the functional operation and interaction between design, assertion and system testbench elements. From its conception, the Verdi DKP has
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